Datasheet > FM28V202A-TG

FM28V202A-TG

更新时间： 2024-03-03 10:09:41

品牌	Logo	应用领域
英飞凌 - INFINEON		存储
页数	文件大小	规格书
22页	497K
描述
铁电存储器 (F-RAM)

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

FM28V202A-TG 数据手册

FM28V202A

Pinout

Figure 1. 44-pin TSOP II pinout

44-pin TSOP II

(×

16)

Top View

(not to scale)

Pin Definitions

Pin Name

I/O Type

Input

Description

A₀–A₁₆

Address inputs: The 17 address lines select one of 128K words in the F-RAM array. The lowest two

address lines A₁–A₀may be used for page mode read and write operations.

DQ₀–DQ₁₅Input/Output Data I/O Lines: 16-bit bidirectional data bus for accessing the F-RAM array.

Input

Write Enable: A write cycle begins when WE is asserted. The rising edge causes the FM28V202A to

write the data on the DQ bus to the F-RAM array. The falling edge of WE latches a new column address

for page mode write cycles.

Input

Chip Enable: The device is selected and a new memory access begins on the falling edge of CE. The

entire address is latched internally at this point. Subsequent changes to the A₁–A₀address inputs allow

page mode operation.

Input

Output Enable: When OE is LOW, the FM28V202A drives the data bus when the valid read data is

available. Deasserting OE HIGH tristates the DQ pins.

Upper Byte Select: Enables DQ₁₅–DQ₈pins during reads and writes. These pins are HI-Z if UB is HIGH.

If the user does not perform byte writes and the device is not configured as a 256K × 8, the UB and LB

pins may be tied to ground.

Input

Lower Byte Select: Enables DQ₇–DQ₀pins during reads and writes. These pins are HI-Z if LB is HIGH.

If the user does not perform byte writes and the device is not configured as a 256 K × 8, the UB and LB

pins may be tied to ground.

Input

Sleep: When ZZ is LOW, the device enters a low-power sleep mode for the lowest supply current

condition. ZZ must be HIGH for a normal read/write operation. This pin must be tied to V_DDif not used.

V_SS

V_DD

Ground

Ground for the device. Must be connected to the ground of the system.

Power supply Power supply input to the device.

No connect No connect. This pin is not connected to the die.

Document Number: 001-90309 Rev. *G

Page 3 of 22

1 234 5 6 7...22

下载PDF

与FM28V202A-TG相关器件

型号	品牌	描述	获取价格	数据表
FM28V202A-TGTR	CYPRESS	Memory Circuit, 128KX16, CMOS, PDSO44, TSOP2-44	获取价格
FM28V202A-TGTR	INFINEON	铁电存储器 (F-RAM)	获取价格
FM28V202-TG	CYPRESS	2Mbit (128Kx16)F-RAM Memory	获取价格
FM28V202-TGTR	CYPRESS	2Mbit (128Kx16)F-RAM Memory	获取价格
FM290	RECTRON	Rectifier Diode, Schottky, 1 Phase, 1 Element, 2A, 90V V(RRM), Silicon, DO-214AA, ROHS COM	获取价格
FM290A	RECTRON	Rectifier Diode, Schottky, 1 Phase, 1 Element, 2A, 90V V(RRM), Silicon, DO-214AC, ROHS COM	获取价格