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FAN5026_11 PDF预览

FAN5026_11

更新时间: 2022-05-13 21:18:54
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 双倍数据速率控制器
页数 文件大小 规格书
17页 758K
描述
Dual DDR / Dual-Output PWM Controller

FAN5026_11 数据手册

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Pin Configuration  
Figure 3. TSSOP-28  
Pin Definitions  
Pin #  
Name  
Description  
Analog Ground. This is the signal ground reference for the IC. All voltage levels are measured  
with respect to this pin  
1
AGND  
2
27  
3
LDRV1  
LDRV2  
PGND1  
PGND2  
SW1  
Low-Side Drive. The lowꢀside (lower) MOSFET driver output. Connect to gate of lowꢀside  
MOSFET.  
Power Ground. The return for the lowꢀside MOSFET driver. Connect to source of lowꢀside  
MOSFET.  
26  
4
Switching Node. Return for the highꢀside MOSFET driver and a current sense input. Connect  
to source of highꢀside MOSFET and lowꢀside MOSFET drain.  
25  
5
SW2  
HDRV1  
HDRV2  
BOOT1  
BOOT2  
ISNS1  
ISNS2  
High-Side Drive. Highꢀside (upper) MOSFET driver output. Connect to gate of highꢀside  
MOSFET.  
24  
6
BOOT. Positive supply for the upper MOSFET driver. Connect as shown in Figure 4.  
23  
7
Current-Sense Input. Monitors the voltage drop across the lower MOSFET or external sense  
resistor for current feedback.  
22  
8
21  
9
EN1  
EN2  
Enable. Enables operation when pulled to logic HIGH. Toggling EN resets the regulator after a  
latched fault condition. These are CMOS inputs whose state is indeterminate if left open.  
GND  
Ground  
20  
10  
19  
VSEN1  
VSEN2  
Output Voltage Sense. The feedback from the outputs; used for regulation as well as PG,  
underꢀvoltage, and overꢀvoltage protection and monitoring.  
Continued on the following page…  
© 2005 Fairchild Semiconductor Corporation  
FAN5026 • Rev. 1.0.8  
www.fairchildsemi.com  
3

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