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FAN2500S27X PDF预览

FAN2500S27X

更新时间: 2024-01-20 15:55:28
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 线性稳压器IC调节器电源电路光电二极管输出元件
页数 文件大小 规格书
10页 254K
描述
100 mA CMOS LDO Regulators

FAN2500S27X 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SOT-23包装说明:SOT-23, 5 PIN
针数:5Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.66Is Samacsys:N
可调性:FIXED最大回动电压 1:0.14 V
标称回动电压 1:0.1 V最大绝对输入电压:7 V
最大输入电压:6.5 V最小输入电压:2.7 V
JESD-30 代码:R-PDSO-G5JESD-609代码:e3
长度:2.9 mm最大负载调整率:0.054%
湿度敏感等级:1功能数量:1
输出次数:1端子数量:5
工作温度TJ-Max:125 °C工作温度TJ-Min:-40 °C
最大输出电流 1:0.1 A最大输出电压 1:2.754 V
最小输出电压 1:2.646 V标称输出电压 1:2.7 V
封装主体材料:PLASTIC/EPOXY封装代码:LSSOP
封装等效代码:TSOP5/6,.11,37封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260认证状态:Not Qualified
调节器类型:FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR座面最大高度:1.45 mm
子类别:Other Regulators表面贴装:YES
技术:CMOS端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.95 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
最大电压容差:2%宽度:1.65 mm
Base Number Matches:1

FAN2500S27X 数据手册

 浏览型号FAN2500S27X的Datasheet PDF文件第1页浏览型号FAN2500S27X的Datasheet PDF文件第2页浏览型号FAN2500S27X的Datasheet PDF文件第3页浏览型号FAN2500S27X的Datasheet PDF文件第5页浏览型号FAN2500S27X的Datasheet PDF文件第6页浏览型号FAN2500S27X的Datasheet PDF文件第7页 
PRODUCT SPECIFICATION  
FAN2500/FAN2501  
the device to enter a thermal cycling loop, in which the  
Thermal Characteristics  
circuit enters a shutdown condition, cools, re-enables, and  
then again overheats and shuts down repeatedly due to an  
unmanaged fault condition.  
The FAN2500/01 is designed to supply 100mA at the  
specified output voltage with an operating die (junction)  
temperature of up to 125°C. Once the power dissipation and  
thermal resistance is known, the maximum junction  
temperature of the device can be calculated. While the power  
dissipation is calculated from known electrical parameters,  
the thermal resistance is a result of the thermal characteris-  
tics of the compact SOT23-5 surface-mount package and the  
surrounding PC Board copper to which it is mounted.  
Operation of Adjustable Version  
The adjustable version of the FAN2500/01 includes an input  
pin ADJ which allows the user to select an output voltage  
ranging from 1.8V to near VIN, using an external resistor  
divider. The voltage VADJ presented to the ADJ pin is fed to  
the onboard error amplifier which adjusts the output voltage  
until VADJ is equal to the onboard bandgap reference voltage  
of 1.32V(typ). The equation is:  
The power dissipation is equal to the product of the input-to-  
output voltage differential and the output current plus the  
ground current multiplied by the input voltage, or:  
Rupper  
VOUT = 1.32V × 1 + ---------------  
Rlower  
PD = (VIN – VOUT)IOUT + VINIGND  
The total value of the resistor chain should not exceed  
250Ktotal to keep the error amplifier biased during  
no-load conditions. Programming output voltages very near  
VIN need to allow for the magnitude and variation of the  
dropout voltage VDO over load, supply, and temperature  
variations. Note that the low-leakage FET input to the  
CMOS Error Amplifier induces no bias current error to the  
calculation.  
The ground pin current IGND can be found in the charts  
provided in the Electrical Characteristics section.  
The relationship describing the thermal behavior of the  
package is:  
TJ(max) – TA  
-------------------------------  
PD(max)  
=
θJA  
where TJ(max) is the maximum allowable junction tempera-  
ture of the die, which is 125°C, and TA is the ambient operat-  
ing temperature. θJA is dependent on the surrounding PC  
board layout and can be empirically obtained. While the θJC  
(junction-to-case) of the SOT23-5 package is specified at  
130°C /W, the θJA of the minimum PWB footprint will be at  
least 235°C /W. This can be improved upon by providing a  
heat sink of surrounding copper ground on the PWB.  
Depending on the size of the copper area, the resulting θJA  
can range from approximately 180°C /W for one square inch  
to nearly 130°C /W for 4 square inches. The addition of  
backside copper with through-holes, stiffeners, and other  
enhancements can also aid in reducing this value. The heat  
contributed by the dissipation of other devices located  
nearby must be included in design considerations.  
General PWB Layout Considerations  
To achieve the full performance of the device, careful circuit  
layout and grounding technique must be observed. Establish-  
ing a small local ground, to which the GND pin, the output  
and bypass capacitors are connected, is recommended, while  
the input capacitor should be grounded to the main ground  
plane. The quiet local ground is then routed back to the main  
ground plane using feedthrough vias. In general, the high-  
frequency compensation components (input, bypass, and  
output capacitors) should be located as close to the device as  
possible. The proximity of the output capacitor is especially  
important to achieve optimal noise compensation from the  
onboard error amplifier, especially during high load condi-  
tions. A large copper area in the local ground will provide the  
heat sinking discussed above when high power dissipation  
significantly increases the temperature of the device.  
Once the limiting parameters in these two relationships have  
been determined, the design can be modified to ensure that  
the device remains within specified operating conditions.  
If overload conditions are not considered, it is possible for  
Component-side copper provides significantly better thermal  
performance for this surface-mount device, compared to that  
obtained when using only copper planes on the underside.  
4
REV. 1.0.6 2/14/03  

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