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EV1320QI PDF预览

EV1320QI

更新时间: 2024-01-10 10:12:00
品牌 Logo 应用领域
ENPIRION 转换器存储开关PC
页数 文件大小 规格书
20页 1948K
描述
The EV1320QI is a DC to DC converter specifically designed for memory termination applications.

EV1320QI 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:HVQCCN,Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.71Samacsys Confidence:4
Samacsys Status:Released2D Presentation:https://componentsearchengine.com/2D/0T/1546603.1.1.png
Schematic Symbol:https://componentsearchengine.com/symbol.php?partID=1546603PCB Footprint:https://componentsearchengine.com/footprint.php?partID=1546603
3D View:https://componentsearchengine.com/viewer/3D.php?partID=1546603Samacsys PartID:1546603
Samacsys Image:https://componentsearchengine.com/Images/9/EV1320QI.jpgSamacsys Thumbnail Image:https://componentsearchengine.com/Thumbnails/1/EV1320QI.jpg
Samacsys Pin Count:16Samacsys Part Category:Integrated Circuit
Samacsys Package Category:Quad Flat No-LeadSamacsys Footprint Name:16-pin (3mm x 3mm x 0.55mm) QFN
Samacsys Released Date:2020-05-21 08:41:08Is Samacsys:N
模拟集成电路 - 其他类型:SWITCHING REGULATOR最大输入电压:3.465 V
最小输入电压:3 V标称输入电压:3.3 V
JESD-30 代码:S-XQCC-N16JESD-609代码:e3
长度:3 mm湿度敏感等级:3
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
标称输出电压:0.75 V封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
座面最大高度:0.6 mm表面贴装:YES
最大切换频率:750 kHz温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3 mm
Base Number Matches:1

EV1320QI 数据手册

 浏览型号EV1320QI的Datasheet PDF文件第1页浏览型号EV1320QI的Datasheet PDF文件第3页浏览型号EV1320QI的Datasheet PDF文件第4页浏览型号EV1320QI的Datasheet PDF文件第5页浏览型号EV1320QI的Datasheet PDF文件第6页浏览型号EV1320QI的Datasheet PDF文件第7页 
EV1320QI  
Ordering Information  
Part Number  
EV1320QI  
EV1320QI-E  
Package Markings  
EV1320QI  
EV1320QI  
Temp Rating (°C)  
-40 to +85  
Package Description  
16-pin (3mm x 3mm x 0.55mm) QFN T&R  
QFN Evaluation Board  
Pin Assignments (Top View)  
Figure 3: Pin Out Diagram (Top View)  
NOTE A: Shaded area highlights exposed metal below the package that is not to be mechanically or electrically  
connected to the PCB. Refer to Figure 10 for details.  
NOTE B: White ‘dot’ on top left is pin 1 indicator on top of the device package.  
Pin Description  
PIN  
NAME  
FUNCTION  
This pin is internally not connected. May be used as part of the VDDQ copper to optimize the  
layout. Otherwise, leave this pin open. See Figure 9.  
Input Supply for internal controller and protection circuitry  
1
NC  
2
AVIN  
Input Enable. Applying a logic high enables the output and initiates a soft-start. Applying a logic  
ENABLE low disables and discharges the output. ENABLE is internally tied to AVIN and ground through  
a 100k resistor divider. Leaving ENABLE floating will result in voltage at half of AVIN.  
3
4
5
6
POK  
SS  
AGND  
VTT OK flag. This is an open drain output usually pulled up to AVIN. Leave floating if unused.  
Soft Start pin. Connect soft start capacitor between this pin and AGND.  
Quiet ground for analog circuitry. Connect to the ground plane with a via next to the pin.  
Power ground. Connect these pins to the ground electrode of the input and output filter  
capacitors. See layout recommendations for more details.  
7, 8  
PGND  
9,10  
11,12  
13,14  
15,16  
C1N  
VOUT  
C1P  
Place 1 x 22µF and 1 x 10µF X5R MLCC capacitors between C1N and C1P.  
VTT voltage = ½ VDDQ.  
Place 1 x 22µF and 1 x 10µF X5R MLCC capacitors between C1N and C1P.  
VDDQ voltage; VOUT (VTT) tracks this voltage.  
VDDQ  
Enpirion 2012 all rights reserved, E&OE  
Enpirion Confidential  
www.enpirion.com, Page 2  
06831  
April 9, 2012  
Rev: C  

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