5秒后页面跳转
EPM1270M100I3N PDF预览

EPM1270M100I3N

更新时间: 2024-02-03 18:53:59
品牌 Logo 应用领域
英特尔 - INTEL 输入元件可编程逻辑
页数 文件大小 规格书
98页 1060K
描述
Flash PLD, PBGA100, 6 X 6 MM, 0.50 MM PITCH, LEAD FREE, MICRO, FBGA-100

EPM1270M100I3N 技术参数

是否Rohs认证:符合生命周期:Active
包装说明:BGA,Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.57
Is Samacsys:N其他特性:IT CAN ALSO OPERATE AT 3.3V
JESD-30 代码:S-PBGA-B100JESD-609代码:e1
专用输入次数:I/O 线路数量:
端子数量:100组织:0 DEDICATED INPUTS, 0 I/O
输出函数:MACROCELL封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):260
可编程逻辑类型:FLASH PLD认证状态:Not Qualified
最大供电电压:2.625 V最小供电电压:2.375 V
标称供电电压:2.5 V表面贴装:YES
端子面层:TIN SILVER COPPER端子形式:BALL
端子位置:BOTTOM处于峰值回流温度下的最长时间:40
Base Number Matches:1

EPM1270M100I3N 数据手册

 浏览型号EPM1270M100I3N的Datasheet PDF文件第2页浏览型号EPM1270M100I3N的Datasheet PDF文件第3页浏览型号EPM1270M100I3N的Datasheet PDF文件第4页浏览型号EPM1270M100I3N的Datasheet PDF文件第5页浏览型号EPM1270M100I3N的Datasheet PDF文件第6页浏览型号EPM1270M100I3N的Datasheet PDF文件第7页 
Section I. MAX II Device  
Family Data Sheet  
This section provides designers with the data sheet specifications for  
MAX® II devices. The chapters contain feature definitions of the internal  
architecture, Joint Test Action Group (JTAG) and in-system  
programmability (ISP) information, DC operating conditions, AC timing  
parameters, and ordering information for MAX II devices.  
This section includes the following chapters:  
Chapter 1. Introduction  
Chapter 2. MAX II Architecture  
Chapter 3. JTAG & In-System Programmability  
Chapter 4. Hot Socketing & Power-On Reset in MAX II Devices  
Chapter 5. DC & Switching Characteristics  
Chapter 6. Reference & Ordering Information  
The table below shows the revision history for Chapters 1 through 6.  
Revision History  
Chapter(s)  
Date/Version  
August 2006, v1.5  
July 2006, v1.4  
June 2005, v1.3  
Changes Made  
Minor update to features list.  
Minor updates to tables.  
1
Updated timing numbers in Table 1-1.  
December 2004, v1.2 Updated timing numbers in Table 1-1.  
Updated timing numbers in Table 1-1.  
June 2004, v1.1  
2
Updated functional description and I/O  
August 2006, v1.6  
structure sections.  
Altera Corporation  
Section I–1  
Preliminary  

与EPM1270M100I3N相关器件

型号 品牌 获取价格 描述 数据表
EPM1270M100I4ES INTEL

获取价格

Flash PLD, PBGA100, 6 X 6 MM, 0.50 MM PITCH, MICRO, FBGA-100
EPM1270M100I4N INTEL

获取价格

Flash PLD, PBGA100, 6 X 6 MM, 0.50 MM PITCH, LEAD FREE, MICRO, FBGA-100
EPM1270M100I5N INTEL

获取价格

Flash PLD, PBGA100, 6 X 6 MM, 0.50 MM PITCH, LEAD FREE, MICRO, FBGA-100
EPM1270M256C3N INTEL

获取价格

Flash PLD, 6.2ns, 980-Cell, CMOS, PBGA256, LEAD FREE, MICRO, FBGA-256
EPM1270M256C5N INTEL

获取价格

Flash PLD, 10ns, 980-Cell, CMOS, PBGA256, LEAD FREE, MICRO, FBGA-256
EPM1270M256I3N INTEL

获取价格

Flash PLD, 6.2ns, 980-Cell, CMOS, PBGA256, LEAD FREE, MICRO, FBGA-256
EPM1270M256I5N INTEL

获取价格

Flash PLD, 10ns, 980-Cell, CMOS, PBGA256, LEAD FREE, MICRO, FBGA-256
EPM1270M256I5N ALTERA

获取价格

Flash PLD, 10ns, 980-Cell, CMOS, PBGA256, LEAD FREE, MICRO, FBGA-256
EPM1270T100A ALTERA

获取价格

MAX II Device Family
EPM1270T100C ALTERA

获取价格

MAX II Device Family