Datasheet > EPF10K10

EPF10K10

更新时间： 2022-11-25 13:03:52

品牌	Logo	应用领域
阿尔特拉 - ALTERA		可编程逻辑
页数	文件大小	规格书
138页	1955K
描述
EMBEDDED PROGRAMMABLE LOGIC FAMILY

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数据手册

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EPF10K10 数据手册

FLEX 10K Embedded Programmable Logic Family Data Sheet

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Flexible interconnect

–

FastTrack^®Interconnect continuous routing structure for fast,

predictable interconnect delays

–

Dedicated carry chain that implements arithmetic functions such

as fast adders, counters, and comparators (automatically used by

software tools and megafunctions)

–

Dedicated cascade chain that implements high-speed,

high-fan-in logic functions (automatically used by software tools

and megafunctions)

–

Tri-state emulation that implements internal tri-state buses

Up to six global clock signals and four global clear signals

■

Powerful I/O pins

–

Individual tri-state output enable control for each pin

Open-drain option on each I/O pin

Programmable output slew-rate control to reduce switching

noise

–

FLEX 10KA devices support hot-socketing

■

Peripheral register for fast setup and clock-to-output delay

Flexible package options

–

Available in a variety of packages with 84 to 600 pins (see

Table 4)

Pin-compatibility with other FLEX 10K devices in the same

package

FineLine BGA^TMpackages maximize board space efficiency

■

Software design support and automatic place-and-route provided by

Altera’s MAX+PLUS^®II development system for Windows-based

PCs and Sun SPARCstation, HP 9000 Series 700/800, and IBM RISC

System/6000 workstations, and Quartus^TMdevelopment system for

Windows-based PCs and Sun SPARCstation and HP 9000 Series 700

workstations

Additional design entry and simulation support provided by EDIF

2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM),

DesignWare components, Verilog HDL, VHDL, and other interfaces

to popular EDA tools from manufacturers such as Cadence,

Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity,

VeriBest, and Viewlogic

Altera Corporation

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