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EP4CE55F23C8N PDF预览

EP4CE55F23C8N

更新时间: 2024-02-22 13:40:57
品牌 Logo 应用领域
阿尔特拉 - ALTERA 现场可编程门阵列可编程逻辑时钟
页数 文件大小 规格书
42页 697K
描述
Cyclone IV Device Datasheet

EP4CE55F23C8N 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:23 X 23 MM, 1 MM PITCH, LEAD FREE, FBGA-484Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:1.61
最大时钟频率:472.5 MHzJESD-30 代码:S-PBGA-B484
JESD-609代码:e1长度:23 mm
湿度敏感等级:3可配置逻辑块数量:3491
输入次数:327逻辑单元数量:55856
输出次数:327端子数量:484
最高工作温度:85 °C最低工作温度:
组织:3491 CLBS封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA484,22X22,40
封装形状:SQUARE封装形式:GRID ARRAY
峰值回流温度(摄氏度):260电源:1.2,1.2/3.3,2.5 V
可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY认证状态:Not Qualified
座面最大高度:2.4 mm子类别:Field Programmable Gate Arrays
最大供电电压:1.25 V最小供电电压:1.15 V
标称供电电压:1.2 V表面贴装:YES
温度等级:OTHER端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:40
宽度:23 mmBase Number Matches:1

EP4CE55F23C8N 数据手册

 浏览型号EP4CE55F23C8N的Datasheet PDF文件第36页浏览型号EP4CE55F23C8N的Datasheet PDF文件第37页浏览型号EP4CE55F23C8N的Datasheet PDF文件第38页浏览型号EP4CE55F23C8N的Datasheet PDF文件第39页浏览型号EP4CE55F23C8N的Datasheet PDF文件第40页浏览型号EP4CE55F23C8N的Datasheet PDF文件第41页 
1–42  
Chapter 1: Cyclone IV Device Datasheet  
Document Revision History  
Document Revision History  
Table 1–47 lists the revision history for this chapter.  
Table 1–47. Document Revision History  
Date  
Version  
Changes  
Updated the maximum value for VI, VCCD_PLL, VCCIO, VCC_CLKIN, VCCH_GXB, and VCCA_GXB  
Table 1–1.  
Updated Table 1–11 and Table 1–22.  
Updated Table 1–21 to include peak-to-peak differential input voltage for the  
October 2012  
1.6  
Cyclone IV GX transceiver input reference clock.  
Updated Table 1–29 to include the typical DCLK value.  
Updated the minimum fHSCLK value in Table 1–31, Table 1–32, Table 1–33,  
Table 1–34, and Table 1–35.  
Updated “Maximum Allowed Overshoot or Undershoot Voltage”, “Operating  
Conditions”, and “PLL Specifications” sections.  
November 2011  
December 2010  
1.5  
1.4  
Updated Table 1–2, Table 1–3, Table 1–4, Table 1–5, Table 1–8, Table 1–9,  
Table 1–15, Table 1–18, Table 1–19, and Table 1–21.  
Updated Figure 1–1.  
Updated for the Quartus II software version 10.1 release.  
Updated Table 1–21 and Table 1–25.  
Minor text edits.  
Updated for the Quartus II software version 10.0 release:  
Updated Table 1–3, Table 1–4, Table 1–21, Table 1–25, Table 1–28, Table 1–30,  
Table 1–40, Table 1–41, Table 1–42, Table 1–43, Table 1–44, and Table 1–45.  
July 2010  
1.3  
Updated Figure 1–2 and Figure 1–3.  
Removed SW Requirement and TCCS for Cyclone IV Devices tables.  
Minor text edits.  
Updated to include automotive devices:  
Updated the “Operating Conditions” and “PLL Specifications” sections.  
Updated Table 1–1, Table 1–8, Table 1–9, Table 1–21, Table 1–26, Table 1–27,  
Table 1–31, Table 1–32, Table 1–33, Table 1–34, Table 1–35, Table 1–36,  
Table 1–37, Table 1–38, Table 1–40, Table 1–42, and Table 1–43.  
March 2010  
1.2  
Added Table 1–5 to include ESD for Cyclone IV devices GPIOs and HSSI I/Os.  
Added Table 1–44 and Table 1–45 to include IOE programmable delay for  
Cyclone IV E 1.2 V core voltage devices.  
Minor text edits.  
Updated Table 1–3 through Table 1–44 to include information for Cyclone IV E  
devices and Cyclone IV GX devices for Quartus II software version 9.1 SP1 release.  
February 2010  
1.1  
1.0  
Minor text edits.  
November 2009  
Initial release.  
Cyclone IV Device Handbook,  
Volume 3  
October 2012 Altera Corporation  

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