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EP2AGX65EF29C6N PDF预览

EP2AGX65EF29C6N

更新时间： 2024-02-22 08:12:24
品牌 Logo 应用领域
英特尔 - INTEL 时钟LTE栅可编程逻辑
页数 文件大小 规格书
78页 808K
描述
Field Programmable Gate Array, 500MHz, PBGA780, 29 X 29 MM, LEAD FREE, MS-034, FBGA-780

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EP2AGX65EF29C6N 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：HBGA,Reach Compliance Code：compliant
风险等级：5.27最大时钟频率：500 MHz
JESD-30 代码：S-PBGA-B780JESD-609代码：e1
长度：29 mm端子数量：780
最高工作温度：85 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：HBGA
封装形状：SQUARE封装形式：GRID ARRAY, HEAT SINK/SLUG
峰值回流温度（摄氏度）：NOT SPECIFIED可编程逻辑类型：FIELD PROGRAMMABLE GATE ARRAY
座面最大高度：2.7 mm最大供电电压：0.93 V
最小供电电压：0.87 V标称供电电压：0.9 V
表面贴装：YES温度等级：OTHER
端子面层：TIN SILVER COPPER端子形式：BALL
端子节距：1 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：29 mm
Base Number Matches：1

EP2AGX65EF29C6N 数据手册

 浏览型号EP2AGX65EF29C6N的Datasheet PDF文件第1页浏览型号EP2AGX65EF29C6N的Datasheet PDF文件第3页浏览型号EP2AGX65EF29C6N的Datasheet PDF文件第4页浏览型号EP2AGX65EF29C6N的Datasheet PDF文件第5页浏览型号EP2AGX65EF29C6N的Datasheet PDF文件第6页浏览型号EP2AGX65EF29C6N的Datasheet PDF文件第7页 
1–2  
Chapter 1: Device Datasheet for Arria II Devices  
Electrical Characteristics  
c
Conditions beyond those listed in Table 1–1 and Table 1–2 may cause permanent  
damage to the device. Additionally, device operation at the absolute maximum  
ratings for extended periods of time may have adverse effects on the device.  
Table 1–1 lists the absolute maximum ratings for Arria II GX devices.  
Table 1–1. Absolute Maximum Ratings for Arria II GX Devices  
Symbol  
VCC  
Description  
Minimum  
Maximum  
Unit  
Supplies power to the core, periphery, I/O registers, PCI Express®  
(PIPE) (PCIe) HIP block, and transceiver PCS  
–0.5  
1.35  
V
VCCCB  
Supplies power for the configuration RAM bits  
–0.5  
–0.5  
1.8  
V
V
VCCBAT  
Battery back-up power supply for design security volatile key register  
3.75  
Supplies power to the I/O pre-drivers, differential input buffers, and  
MSEL circuitry  
VCCPD  
–0.5  
3.75  
V
VCCIO  
Supplies power to the I/O banks  
–0.5  
–0.5  
3.9  
V
V
VCCD_PLL  
Supplies power to the digital portions of the PLL  
1.35  
Supplies power to the analog portions of the PLL and device-wide  
power management circuitry  
VCCA_PLL  
–0.5  
3.75  
V
VI  
DC input voltage  
–0.5  
–25  
—
4.0  
40  
V
mA  
V
IOUT  
VCCA  
DC output current, per pin  
Supplies power to the transceiver PMA regulator  
3.75  
1.21  
1.8  
VCCL_GXB Supplies power to the transceiver PMA TX, PMA RX, and clocking  
VCCH_GXB Supplies power to the transceiver PMA output (TX) buffer  
—
V
—
V
TJ  
Operating junction temperature  
Storage temperature (no bias)  
–55  
–65  
125  
150  
°C  
°C  
TSTG  
Table 1–2 lists the absolute maximum ratings for Arria II GZ devices.  
Table 1–2. Absolute Maximum Ratings for Arria II GZ Devices (Part 1 of 2)  
Symbol  
VCC  
Description  
Minimum  
Maximum  
Unit  
Supplies power to the core, periphery, I/O registers, PCIe HIP block, and  
transceiver PCS  
-0.5  
1.35  
V
VCCCB  
Power supply to the configuration RAM bits  
Supplies power to the configuration pins  
Auxiliary supply  
-0.5  
-0.5  
-0.5  
-0.5  
1.8  
V
V
V
V
VCCPGM  
VCCAUX  
VCCBAT  
3.75  
3.75  
3.75  
Supplies battery back-up power for design security volatile key register  
Supplies power to the I/O pre-drivers, differential input buffers, and  
MSEL circuitry  
VCCPD  
-0.5  
3.75  
V
VCCIO  
Supplies power to the I/O banks  
-0.5  
-0.5  
-0.5  
3.9  
V
V
V
VCC_CLKIN  
VCCD_PLL  
Supplies power to the differential clock input  
Supplies power to the digital portions of the PLL  
3.75  
1.35  
Supplies power to the analog portions of the PLL and device-wide  
power management circuitry  
VCCA_PLL  
-0.5  
3.75  
V
VI  
DC input voltage  
-0.5  
-25  
4.0  
40  
V
IOUT  
DC output current, per pin  
mA  
Arria II Device Handbook Volume 3: Device Datasheet and Addendum  
December 2013 Altera Corporation  
1234567...78

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