Datasheet > EM658160TS-7

EM658160TS-7

更新时间： 2022-11-25 13:32:22

品牌	Logo	应用领域
钰创 - ETRON		动态存储器双倍数据速率
页数	文件大小	规格书
26页	158K
描述
4M x 16 DDR Synchronous DRAM (SDRAM)

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EM658160TS-7 数据手册

Et r on Tech

EM658160

4Mx16 DDR SDRAM

Operation Mode

Fully synchronous operations are performed to latch the commands at the positive edges of CK. Table 2

shows the truth table for the operation commands.

Table 2. Truth Table (Note (1), (2) )

Command

State CKE_n-1CKE_nDM BS0,1 A10 A0-9,11 /CS /RAS /CAS /WE

Idle⁽³⁾

Any

Row address

BankActivate

BankPrecharge

PrechargeAll

Any

Active⁽³⁾

Idle

Write

Column

address

(A0 ~ A7)

Write and AutoPrecharge

Read

Column

address

(A0 ~ A7)

Read and Autoprecharge

Mode Register Set

Extended MRS

No-Operation

OP code

Idle

OP code

Any

Active⁽⁴⁾

Burst Stop

Device Deselect

AutoRefresh

Any

Idle

SelfRefresh Entry

SelfRefresh Exit

Idle

(SelfRefresh)

Clock Suspend Mode Entry

Power Down Mode Entry

Active

Any⁽⁵⁾

Clock Suspend Mode Exit

Power Down Mode Exit

Active

Any

(PowerDown)

Data Write/Output Enable

Data Mask/Output Disable

Active

Note: 1. V=Valid data, X=Don't Care, L=Low level, H=High level

2. CKE_nsignal is input level when commands are provided.

CKE_n-1signal is input level one clock cycle before the commands are provided.

3. These are states of bank designated by BS signal.

4. Device state is 1, 2, 4, 8, and full page burst operation.

5. Power Down Mode can not enter in the burst operation.

When this command is asserted in the burst cycle, device state is clock suspend mode.

Etron Confidential

Rev. 1.1

Jan. 2002

1 2 3 456 7 8...26

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