Ei16C550
FIFO UART
Semiconductor, Inc.
FEATURES
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Tri-StateÆTTL drive capabilities for bi-
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5V Operation
directional data bus and control bus
Line break generation and detection
Internal diagnostic capabilities:
Full duplex asynchronous receiver and transmitter
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Easily interfaces to most popular micro-
processors
- Loopback controls for communications link fault
isolation
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Adds or deletes standard asynchronous
communication bits (start, stop, and parity) to or
from a serial data stream
- Break, parity overrun, and framing error simulation
Fully prioritized interrupt systems controls
16 byte FIFO for reduced CPU overhead
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Independently controlled transmitter, receiver,
line status, and data set interrupts
Programmable baud rate generator allows
division of any input clock by 1 to (216-1) and
generates the internal 16 x clock
DESCRIPTION
The Epic Ei16C550 Universal Asynchronous Receiver
Transmitter (UART) is a CMOS-VLSI communication
device in a single package.
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Independent receiver clock input
MODEM control functions (CTS, RTS, DSR,
DTR, RI,and DCD)
The UART performs serial to parallel conversion on
data characters received from a peripheral device or a
MODEM, and parallel-to-serial conversions on data charac-
ters received from the CPU. The CPU can read the complete
status of the UART at any time during the functional operation.
Status information reported includes the type and condition of
the transfer operation being performed by the UART, as well
as any error conditions (party, overrun, framing, or break
detect).
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Fully programmable serial interface
characteristics:
- 5, 6, 7, or 8 bit characters
- Even, odd, or no-parity bit generation and
detection
- 1, 1.5, or 2 stop bit generation
- Baud generation (DC to 56k baud)
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False start bit detection
Complete status reporting capabilities
Part Numbers May Be Marked With "IMP" or "Ei."
PIN CONFIGURATION
D0
D1
D2
D3
D4
D5
D6
D7
RCLK
SIN
1
2
3
4
5
6
7
8
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VCC
RIï
DCDï
DSRï
CTSï
MR
OUT1ï
DTRï
RTSï
OUT2ï
INTRPT
RXRDYï
A0
A1
A2
ADSï
TXRDYï
DDIS
DISTR
DISTRï
N.C.
D5
1
2
3
4
5
6
7
8
9
36 N.C.
35 RESET
39 MR
D5
D6
D7
7
8
9
D6
34 OP1
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38 OUT1ï
37 DTRï
36 RTSï
35 OUT2ï
34 NC
33 INTRPT
32 RXRDYï
31 A0
E
i
D7
33 DTR
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RCLK
N.C.
RX
32 RTS
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RCLK
SIN
NC
SOUT
CS0
CS1
CS2ï
BAUD-
OUTï
10
11
12
13
14
15
16
17
1
6
C
5
5
0
9
31 OP2
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Ei16C550
Ei16C550
10
11
12
13
14
15
16
17
18
19
20
30 INT
29 RXRDY
28 A0
SOUT
CS0
CS1
TX
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CS0
30 A1
29 A2
CS2ï
BAUDOUTï
XTAL1
XTAL2
DOSTRï
VSS
CS1 10
27 A1
CS2
11
12
26 A2
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BAUDOUT
25 N.C.
44-PIN PLCC
40-PIN DIP
48-PIN TQFP
7
For additional information, contact IMP, Inc. at 408.432.9100 or visit www.impweb.com
IMP, Inc. acquired Epic products on January 26, 2001. (see press release at http://www.impweb.com/PRESS/PR012601.htm)
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