EDI8L32512C
White Electronic Designs
512K x 32 CMOS High Speed Static RAM
FEATURES
DESCRIPTION
The EDI8L32512C is a high speed, 5V, 16 megabit
SRAMꢀ The device is available with access times of
12, 15, 17 and 20ns allowing the creation of a no wait
state DSP memory solutionꢀ The high speed, 5V
supply voltage and control lines make the device ideal
for creating floating point DSP memory solutionsꢀ
n DSP Memory Solution
Motorola DSP96002
Analog SHARC DSP
Texas Instruments TMS320C3x, TMS320C4x
n Random Access Memory Array
Fast Access Times: 12*, 15, 17, and 20ns
TTL Compatible Inputs and Outputs
Fully Static, No Clocks
The device can be configured as a 512K x 32 and used
to create a single chip external data memory solution for
TI's TMS320C30/C31 (Figure 8), TMS320C32 (Figure 9)
or TMS320C4x (Figure 10), Motorola's DSP96002 and
Analog's SHARC DSP (Figure 11)ꢀ Alternatively, the
device's chip enables can be used to configure it as a 1M
x 16ꢀ A 1M x 48 program memory array for Analog's
SHARC DSP is created using three devices (Figure 12)ꢀ
Ifthismemoryistoodeep,two512Kx24s(EDI8L24512C)
can be used to create a 512K x 48 array or two 128K x 24s
(EDI8L24128C) can be used to create a 128K x 48 arrayꢀ
n Surface Mount Package
68 Lead PLCC, Noꢀ 99 JEDEC M0-47AE
Small Footprint, 0ꢀ990 Sqꢀ Inꢀ
Multiple Ground Pins for Maximum
Noise Immunity
n Single +5V (±5%) Supply Operation
* Advance Informationꢀ
The device provides a 56% space savings when
compared to four 512K x 8, 36 pin SOJsꢀ In addition
the EDI8L32512C has only a 10pF load on the data
lines vsꢀ 32pF for four plastic SOJsꢀ
The device provides a memory upgrade of the
EDI8L32256C (256K x 32) or the EDI8L32128C (128K x
32)ꢀ For additional upgrade information see Figure 13ꢀ
Note: Solder Reflow Temperature should not exceed 230°C for 10 secondsꢀ
PIN CONFIGURATIONSAND BLOCK DIAGRAM
FIGꢀ1
BYTE CONTROL
TABLE
PIN NAMES
A0-18
E0-3
W
Address Inputs
Chip
Byte
Chip Enables (One per Byte)
Master Write Enable
Master Output Enable
Enable Control
60 DQ14
59 DQ13
58 DQ12
DQ17 10
DQ18 11
DQ19 12
E0
E1
E2
E3
DQ0-7
G
57
VSS
DQ8-15
DQ16-23
DQ24-31
V
SS 13
DQ0-31 Common Data Input/Output
56 DQ11
55 DQ10
54 DQ9
53 DQ8
52 VCC
51 DQ7
50 DQ6
49 DQ5
48 DQ4
DQ20 14
DQ21 15
DQ22 16
DQ23 17
VCC
VSS
NC
Power (+5V ±5%)
Ground
V
CC 18
DQ24 19
DQ25 20
DQ26 21
DQ27 22
No Connection
47
VSS
V
SS 23
46 DQ3
45 DQ2
44 DQ1
DQ28 24
DQ29 25
DQ30 26
A0-18
19
G
512K x 32
Memory
Array
W
DQ0-7
E
0
1
2
3
DQ8-15
DQ16-23
DQ24-31
E
E
E
Note: For memory upgrade information, refer to Page 8, Figure 13
"EDI MCM-L Upgrade Pathꢀ"
August 2000 Revꢀ 7
ECO#13097
1
White Electronic Designs Corporation (508) 485-4000 wwwꢀwhiteedcꢀcom