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EBE20AE4ABFA PDF预览

EBE20AE4ABFA

更新时间: 2022-12-22 00:39:56
品牌 Logo 应用领域
尔必达 - ELPIDA 动态存储器双倍数据速率
页数 文件大小 规格书
27页 224K
描述
2GB Registered DDR2 SDRAM DIMM

EBE20AE4ABFA 数据手册

 浏览型号EBE20AE4ABFA的Datasheet PDF文件第18页浏览型号EBE20AE4ABFA的Datasheet PDF文件第19页浏览型号EBE20AE4ABFA的Datasheet PDF文件第20页浏览型号EBE20AE4ABFA的Datasheet PDF文件第22页浏览型号EBE20AE4ABFA的Datasheet PDF文件第23页浏览型号EBE20AE4ABFA的Datasheet PDF文件第24页 
EBE20AE4ABFA  
Clock Jitter [DDR2-667]  
-6E  
667  
Frequency (Mbps)  
Parameter  
Symbol  
min.  
max.  
8000  
125  
Unit  
ps  
Notes  
Average clock period  
Clock period jitter  
tCK (avg)  
tJIT (per)  
3000  
125  
1
5
ps  
Clock period jitter during  
DLL locking period  
tJIT  
(per, lck)  
100  
100  
250  
200  
ps  
ps  
ps  
5
6
6
Cycle to cycle period jitter  
tJIT (cc)  
Cycle to cycle clock period jitter during DLL  
locking period  
tJIT (cc, lck)  
Cumulative error across 2 cycles  
Cumulative error across 3 cycles  
Cumulative error across 4 cycles  
Cumulative error across 5 cycles  
tERR (2per)  
tERR (3per)  
tERR (4per)  
tERR (5per)  
175  
225  
250  
250  
175  
225  
250  
250  
ps  
ps  
ps  
ps  
7
7
7
7
Cumulative error across  
n=6,7,8,9,10 cycles  
tERR  
(6-10per)  
350  
450  
350  
450  
ps  
ps  
7
7
Cumulative error across  
n=11, 12,…49,50 cycles  
tERR  
(11-50per)  
Average high pulse width  
Average low pulse width  
Duty cycle jitter  
tCH (avg)  
tCL (avg)  
tJIT (duty)  
0.48  
0.48  
125  
0.52  
0.52  
125  
tCK (avg)  
tCK (avg)  
ps  
2
3
4
Notes: 1. tCK (avg) is calculated as the average clock period across any consecutive 200cycle window.  
N  
tCK(avg) =  
tCKj  
N
j =1  
N = 200  
2. tCH (avg) is defined as the average high pulse width, as calculated across any consecutive 200 high  
pulses.  
N  
tCH(avg) =  
tCHj (N ×tCK(avg))  
j =1  
N = 200  
3. tCL (avg) is defined as the average low pulse width, as calculated across any consecutive 200 low pulses.  
N  
tCL(avg) =  
tCLj (N × tCK(avg))  
j =1  
N = 200  
4. tJIT (duty) is defined as the cumulative set of tCH jitter and tCL jitter. tCH jitter is the largest deviation of  
any single tCH from tCH (avg). tCL jitter is the largest deviation of any single tCL from tCL (avg).  
tJIT (duty) is not subject to production test.  
tJIT (duty) = Min./Max. of {tJIT (CH), tJIT (CL)}, where:  
tJIT (CH) = {tCHj- tCH (avg) where j = 1 to 200}  
tJIT (CL) = {tCLj tCL (avg) where j = 1 to 200}  
5. tJIT (per) is defined as the largest deviation of any single tCK from tCK (avg).  
tJIT (per) = Min./Max. of { tCKj tCK (avg) where j = 1 to 200}  
tJIT (per) defines the single period jitter when the DLL is already locked. tJIT (per, lck) uses the same  
definition for single period jitter, during the DLL locking period only. tJIT (per) and tJIT (per, lck) are not  
subject to production test.  
Data Sheet E0875E30 (Ver. 3.0)  
21  

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