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DTR2488SM2LCL0LR2 PDF预览

DTR2488SM2LCL0LR2

更新时间: 2022-12-17 12:07:05
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OPLINK /
页数 文件大小 规格书
6页 200K
描述
OC-48/STM-16 2x10 SFF Single Mode CWDM Transceivers

DTR2488SM2LCL0LR2 数据手册

 浏览型号DTR2488SM2LCL0LR2的Datasheet PDF文件第1页浏览型号DTR2488SM2LCL0LR2的Datasheet PDF文件第2页浏览型号DTR2488SM2LCL0LR2的Datasheet PDF文件第3页浏览型号DTR2488SM2LCL0LR2的Datasheet PDF文件第5页浏览型号DTR2488SM2LCL0LR2的Datasheet PDF文件第6页 
DTR-2488-SM2-LC/LS-W-G-CWDM  
Fig.1 DC-coupled modules  
Receiver Power Monitor option 1  
Vcc  
+3.3V  
Capacitor values in  
µ
F, Resistor values in  
1µH coil or  
ferrite inductor  
Vcc  
+
0.1  
10  
0.1  
160 160  
DTR-2488  
External resistor  
50  
line  
line  
1
µ
H coil or  
7
TD+  
14  
11  
1
+
10  
ferrite inductor  
0.1  
100  
LV-PECL  
LV-PECL  
50  
TD-  
15  
10  
8
1
SIGNAL DETECT  
50  
line  
line  
DTR-2488-SM2  
RD+  
100  
50  
RPM  
RD-  
9
806  
(see Power Monitor Options)  
GND  
2,3,6 POSTS  
12,16  
160 160  
Recommended external current  
monitor resistor value is 1k  
chassis  
ground  
Fig.2 AC-coupled modules  
Receiver Power Monitor option 2  
Vcc  
Capacitor values in µF, Resistor values in Ω  
+3.3V  
Vcc  
1µH coil or  
ferrite inductor  
depends on SERDES  
+
0.1  
10  
0.1  
160  
160  
R1  
DTR-2488  
50  
line  
R1  
1
µ
H coil or  
7
TD+  
14  
11  
+
10  
ferrite inductor  
2N3906 or  
equivalent  
0.1  
100  
1
50  
line  
line  
TD-  
15  
10  
AD8551 or  
equivalent  
RPM  
SIGNAL DETECT  
SERDES  
8
1
DTR-2488-SM2  
50  
RD+  
R2  
RPM  
100  
50Ω  
line  
RD-  
(see Power Monitor Options)  
9
806  
GND  
2,3,6 POSTS  
12,16  
R1: 510  
R2: 2k  
depends on SERDES  
recommended  
chassis  
ground  
Application Notes  
SIGNAL DETECT: The SIGNAL DETECT circuit monitors  
the incoming optical signal level and generates a logic LOW  
signal when an insufficient photocurrent is produced. The output  
is LV-TTL with no termination required.  
DATA interface (DC-coupled modules): The interface  
circuit for standard DC-coupled modules with direct-coupled  
LV-PECL interface is shown in Fig. 1. The transmitter input  
has internal 50termination.  
TX DISABLE: The transmitter is normally enabled (i.e. when  
the TX DISABLE control input is not connected). When the  
TX DISABLE control input voltage is higher than VCC - 1.3V,  
the laser is turned off independent of the input data.  
DATA interface (AC-coupled modules): For modules with  
AC coupling option, both transmitter and receiver interfaces  
have internal bias, 50termination andAC coupling capacitors.  
The transmitter can be connected directly to the driving  
SERDES as shown in Fig. 2. The receiver can be connected  
directly to the external 50loads (termination resistor of the  
SERDES). For best performance, both DATA+ & DATA-  
should be used.  
Power supply and grounding: The power supply line should  
be well-filtered. All 0.1µF power supply bypass capacitors  
should be as close to the DTR transceiver module as possible.  
The module case ground is internallyAC-coupled to the circuit  
ground.  
21737-0266, Rev. D  
07-06-2005  
4

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