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DTC144EM3T5G

更新时间： 2024-01-08 21:10:08

品牌	Logo	应用领域
安森美 - ONSEMI		晶体小信号双极晶体管数字晶体管开关光电二极管
页数	文件大小	规格书
10页	82K
描述
Digital Transistors (BRT) NPN Silicon Surface Mount Transistors with Monolithic Bias Resistor Network

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DTC144EM3T5G 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	包装说明：	HALOGEN FREE AND ROHS COMPLIANT, CASE 631AA-01, 3 PIN
针数：	3	Reach Compliance Code：	unknown
风险等级：	5.33	Is Samacsys：	N
其他特性：	BUILT-IN BIAS RESISTOR RATIO IS 1	最大集电极电流 (IC)：	0.1 A
集电极-发射极最大电压：	50 V	配置：	SINGLE WITH BUILT-IN RESISTOR
最小直流电流增益 (hFE)：	80	JESD-30 代码：	R-PDSO-F3
JESD-609代码：	e3	湿度敏感等级：	NOT SPECIFIED
元件数量：	1	端子数量：	3
封装主体材料：	PLASTIC/EPOXY	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	峰值回流温度（摄氏度）：	260
极性/信道类型：	NPN	认证状态：	COMMERCIAL
表面贴装：	YES	端子面层：	MATTE TIN
端子形式：	FLAT	端子位置：	DUAL
处于峰值回流温度下的最长时间：	40	晶体管应用：	SWITCHING
晶体管元件材料：	SILICON	Base Number Matches：	1

DTC144EM3T5G 数据手册

DTC114EM3T5G Series

Digital Transistors (BRT)

NPN Silicon Surface Mount Transistors

with Monolithic Bias Resistor Network

This new series of digital transistors is designed to replace a single

device and its external resistor bias network. The digital transistor

contains a single transistor with a monolithic bias network consisting

of two resistors; a series base resistor and a base−emitter resistor. The

digital transistor eliminates these individual components by

integrating them into a single device. The use of a digital transistor can

reduce both system cost and board space. The device is housed in the

SOT−723 package which is designed for low power surface mount

applications.

http://onsemi.com

NPN SILICON DIGITAL

TRANSISTORS

PIN 3

COLLECTOR

(OUTPUT)

Features

PIN 1

BASE

(INPUT)

• Simplifies Circuit Design

• Reduces Board Space

• Reduces Component Count

PIN 2

EMITTER

(GROUND)

• The SOT−723 Package can be Soldered using Wave or Reflow.

• Available in 4 mm, 8000 Unit Tape & Reel

• These are Pb−Free Devices

MAXIMUM RATINGS (T = 25°C unless otherwise noted)

SOT−723

CASE 631AA

STYLE 1

Rating

Collector-Base Voltage

Collector-Emitter Voltage

Collector Current

Symbol

Value

Unit

Vdc

CBO

CEO

Vdc

100

mAdc

Maximum ratings are those values beyond which device damage can occur.

Maximum ratings applied to the device are individual stress limit values (not

normal operating conditions) and are not valid simultaneously. If these limits are

exceeded, device functional operation is not implied, damage may occur and

reliability may be affected.

MARKING DIAGRAM

xx = Specific Device Code

(See Marking Table on page 2)

M = Date Code

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

Semiconductor Components Industries, LLC, 2006

Publication Order Number:

March, 2006 − Rev. 3

DTC114EM3/D

12 3 4 5 6 7...10

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