Datasheet > DS99R124QSQ

DS99R124QSQ

更新时间： 2024-10-01 06:54:43

品牌	Logo	应用领域
美国国家半导体 - NSC		转换器光电二极管
页数	文件大小	规格书
24页	640K
描述
5 - 43 MHz 18-bit Color FPD-Link II to FPD-Link Converter

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DS99R124QSQ 数据手册

January 28, 2010

DS99R124Q

5 - 43 MHz 18-bit Color FPD-Link II to FPD-Link Converter

General Description

Features

The DS99R124Q converts FPD-Link II to FPD-Link. It trans-

lates a high-speed serialized interface with an embedded

clock over a single pair (FPD-Link II) to three LVDS data/con-

trol streams and one LVDS clock pair (FPD-Link). This serial

bus scheme greatly eases system design by eliminating skew

problems between clock and data, reduces the number of

connector pins, reduces the interconnect size, weight, and

cost, and overall eases PCB layout. In addition, internal DC

balanced decoding is used to support AC-coupled intercon-

nects.

5 – 43 MHz support (140 Mbps to 1.2 Gbps Serial Link)

■

4-channel (3 data + 1 clock) FPD-Link LVDS outputs

3 low-speed over-sampled LVCMOS outputs

AC Coupled STP Interconnect up to 10 meters in length

Integrated input termination

@ Speed link BIST mode and reporting pin

Optional I2C compatible Serial Control Bus

RGB666 + VS, HS, DE converted from 1 pair

Power down mode minimizes power dissipation

The DS99R124Q converter recovers the data (RGB) and

control signals and extracts the clock from a serial stream

(FPD-Link II). It is able to lock to the incoming data stream

without the use of a training sequence or special SYNC pat-

terns and does not require a reference clock. A link status

(LOCK) output signal is provided.

FAST random data lock; no reference clock required

Adjustable input receive equalization

LOCK (real time link status) reporting pin

Low EMI FPD-Link output

SSCG option for lower EMI

Adjustable input equalization of the serial input stream pro-

vides compensation for transmission medium losses of the

cable and reduces the medium-induced deterministic jitter.

EMI is minimized by the use of low voltage differential signal-

ing, output state select feature, and additional output spread

spectrum generation.

1.8V or 3.3V compatible I/O interface

Automotive grade product: AEC-Q100 Grade 2 qualified

>8 kV HBM and ISO 10605 ESD Rating

■

Applications

With fewer wires to the physical interface of the display, FPD-

Link output with LVDS technology is ideal for high speed, low

power and low EMI data transfer.

Automotive Display for Navigation

■

Automotive Display for Entertainment

The DS99R124Q is offered in a 48-pin LLP package and is

specified over the automotive AEC-Q100 Grade 2 tempera-

ture range of -40˚C to +105˚C.

Applications Diagram

30105227

TRI-STATE^®is a registered trademark of National Semiconductor Corporation.

301052

www.national.com

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与DS99R124QSQ相关器件

型号	品牌	获取价格	描述	数据表
DS99R124QSQ/NOPB	TI	获取价格	5MHz 至 43MHz 18 位彩色 FPD-Link II 至 FPD-Link 转换
DS99R124QSQE	NSC	获取价格	5 - 43 MHz 18-bit Color FPD-Link II to FPD-Link Converter
DS99R124QSQE/NOPB	NSC	获取价格	IC LINE TRANSCEIVER, QCC48, 7 X 7 MM, 0.80 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, LLP-4
DS99R124QSQE/NOPB	TI	获取价格	5MHz 至 43MHz 18 位彩色 FPD-Link II 至 FPD-Link 转换
DS99R124QSQX	NSC	获取价格	5 - 43 MHz 18-bit Color FPD-Link II to FPD-Link Converter
DS99R124QSQX/NOPB	TI	获取价格	5MHz 至 43MHz 18 位彩色 FPD-Link II 至 FPD-Link 转换
DS99R421	NSC	获取价格	5-43 MHz FPD-Link LVDS (3 Data + 1 Clock) to Single Embedded Clock DC-Balanced LVDS Conver
DS99R421_08	NSC	获取价格	5-43 MHz FPD-Link LVDS (3 Data + 1 Clock) to Single Embedded Clock DC-Balanced LVDS Conver
DS99R421ISQ	NSC	获取价格	5-43 MHz FPD-Link LVDS (3 Data + 1 Clock) to Single Embedded Clock DC-Balanced LVDS Conver
DS99R421ISQX	NSC	获取价格	5-43 MHz FPD-Link LVDS (3 Data + 1 Clock) to Single Embedded Clock DC-Balanced LVDS Conver

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