Datasheet > DS28E39

DS28E39

更新时间： 2024-02-18 14:42:34

品牌	Logo	应用领域
美信 - MAXIM		/
页数	文件大小	规格书
16页	402K
描述
DeepCover Secure ECDSA Bidirectional Authenticator with ChipDNA PUF Protection

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DS28E39 技术参数

是否Rohs认证：	符合	生命周期：	Active
包装说明：	,	Reach Compliance Code：	compliant
Factory Lead Time：	1 week	风险等级：	5.76
JESD-609代码：	e3	湿度敏感等级：	1
端子面层：	Matte Tin (Sn)

DS28E39 数据手册

DS28E39

DeepCover Secure ECDSA Bidirectional

Authenticator with ChipDNA PUF Protection

and 90.9kbps (max), respectively. The value of the pullup

resistor primarily depends on the network size and load

conditions. The DS28E39 requires a pullup resistor of

1kΩ (max) at any speed.

Decrement Counter

The optional 17-bit decrement counter can be written one

time on a dual-purpose page of memory. A dedicated

device function command is used to decrement the count

value by one with each call. Once the count value reaches

a value of 0, no additional decrements are possible.

The idle state for the 1-Wire bus is high. If for any reason

a transaction needs to be suspended, the bus must be left

in the idle state if the transaction is to resume. If this does

not occur and the bus is left low for more than 15.5μs

(overdrive speed) or more than 120μs (standard speed),

one or more devices on the bus could be reset.

1-Wire Bus System

The 1-Wire bus is a system that has a single bus master

and one or more slaves. In all instances, the DS28E39 is

a slave device. The bus master is typically a microcon-

troller. The discussion of this bus system is broken down

into three topics: hardware configuration, transaction

sequence, and 1-Wire signaling (signal types and timing).

The 1-Wire protocol defines bus transactions in terms of

the bus state during specific time slots that are initiated

on the falling edge of sync pulses from the bus master.

Transaction Sequence

The protocol for accessing the DS28E39 through the

1-Wire port is as follows:

● Initialization

● ROM Function command

● Device Function command

● Transaction/data

Hardware Conﬁguration

The 1-Wire bus has only a single line by definition; it is

important that each device on the bus can drive it at the

appropriate time. To facilitate this, each device attached

to the 1-Wire bus must have open-drain or three-state

outputs. The 1-Wire port of the DS28E39 is open drain

with an internal circuit equivalent.

Initialization

All transactions on the 1-Wire bus begin with an initializa-

tion sequence. The initialization sequence consists of a

reset pulse transmitted by the bus master followed by

presence pulse(s) transmitted by the slave(s). The pres-

ence pulse lets the bus master know that the DS28E39 is

on the bus and is ready to operate. For more details, see

the 1-Wire Signaling and Timing section.

A multidrop bus consists of a 1-Wire bus with multiple

slaves attached. The DS28E39 supports both a standard

and overdrive communication speed of 12.5kbps (max)

PUP

*SEE NOTE

1-WIRE SLAVE PORT

BUS MASTER

PIOX

PIOY

CTL

PUP

DATA

Rx = RECEIVE

Tx = TRANSMIT

BIDIRECTIONAL

OPEN-DRAIN PORT

100Ω

MOSFET

*NOTE: USE A LOW-IMPEDANCE BYPASS OR EQUALLY DRIVE LOGIC ‘1’ WITH PIOY

Figure 3. Hardware Configuration

Maxim Integrated

│ 9

www.maximintegrated.com

1...6 7 8910 11 12...16

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与DS28E39相关器件

型号	品牌	描述	获取价格	数据表
DS28E39Q	MAXIM	DeepCover Secure ECDSA Bidirectional Authenticator with ChipDNA PUF Protection	获取价格
DS28E39QT	MAXIM	DeepCover Secure ECDSA Bidirectional Authenticator with ChipDNA PUF Protection	获取价格
DS28E40	ADI	Deep Cover Automotive 1-Wire Authenticator	获取价格
DS28E50	MAXIM	DeepCover Secure SHA-3 Authenticator with ChipDNA PUF Protection	获取价格
DS28E50	ADI	具有ChipDNA PUF保护的DeepCover安全SHA-3认证器	获取价格
DS28E50Q	MAXIM	DeepCover Secure SHA-3 Authenticator with ChipDNA PUF Protection	获取价格

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