DS26521 Single T1/E1/J1 Transceiver
13.
JTAG BOUNDARY SCAN AND TEST ACCESS PORT ..............................................250
13.1
TAP CONTROLLER STATE MACHINE .........................................................................................251
13.1.1 Test-Logic-Reset................................................................................................................................ 251
13.1.2 Run-Test-Idle ..................................................................................................................................... 251
13.1.3 Select-DR-Scan ................................................................................................................................. 251
13.1.4 Capture-DR........................................................................................................................................ 251
13.1.5 Shift-DR.............................................................................................................................................. 251
13.1.6 Exit1-DR............................................................................................................................................. 251
13.1.7 Pause-DR........................................................................................................................................... 251
13.1.8 Exit2-DR............................................................................................................................................. 251
13.1.9 Update-DR ......................................................................................................................................... 251
13.1.10
13.1.11
13.1.12
13.1.13
13.1.14
13.1.15
13.1.16
Select-IR-Scan ............................................................................................................................... 251
Capture-IR...................................................................................................................................... 252
Shift-IR............................................................................................................................................ 252
Exit1-IR........................................................................................................................................... 252
Pause-IR......................................................................................................................................... 252
Exit2-IR........................................................................................................................................... 252
Update-IR ....................................................................................................................................... 252
13.2
INSTRUCTION REGISTER...........................................................................................................254
13.2.1 SAMPLE:PRELOAD .......................................................................................................................... 254
13.2.2 BYPASS............................................................................................................................................. 254
13.2.3 EXTEST ............................................................................................................................................. 254
13.2.4 CLAMP............................................................................................................................................... 254
13.2.5 HIGHZ................................................................................................................................................ 254
13.2.6 IDCODE ............................................................................................................................................. 254
13.3
13.4
JTAG ID CODES......................................................................................................................255
TEST REGISTERS .....................................................................................................................255
13.4.1 Boundary Scan Register.................................................................................................................... 255
13.4.2 Bypass Register................................................................................................................................. 255
13.4.3 Identification Register......................................................................................................................... 255
14.
15.
PIN CONFIGURATION.................................................................................................256
PACKAGE INFORMATION..........................................................................................257
15.1
64-PIN LQFP (56-G4019-001)................................................................................................257
16.
DOCUMENT REVISION HISTORY...............................................................................258
4 of 258
5秒后页面跳转
深入解析CS8416引脚说明、参数、技术特点
TPA3116D2功放芯片参数详解、引脚说明
移位寄存器74HC165引脚说明、驱动程序示例解读
深入解析AD9833：DDS频率合成器的卓越性能与广泛应用
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
技术参数
数据手册
如果您发现信息不准确，
