ABRIDGED DATA SHEET
DS2465
SHA-256 Coprocessor with 1-Wire Master Function
Pin Configuration
Detailed Description
The DS2465 is a SHA-256 coprocessor with built-in
1-Wire master and two pages of user memory.
TOP VIEW
+
GND
IO
1
2
3
6
5
4
SCL
SDA
SLPZ
Refer to the full data sheet for this information.
DS2465
V
CC
TSOC
The self-timed 1-Wire master function supports advanced
1-Wire waveform features including standard and over-
drive speeds, active pullup, and strong pullup for power
delivery. The active pullup affects rising edges on the
1-Wire side. The strong pullup function uses the same
pullup transistor as the active pullup, but with a differ-
ent control algorithm. Once supplied with command
and data, the input/output controller of the DS2465 per-
forms time-critical 1-Wire communication functions such
as reset/presence-detect cycle, read-byte, write-byte,
single-bit R/W, and triplet for ROM Search, without requir-
ing interaction with the host processor. The host obtains
feedback (completion of a 1-Wire function, presence
pulse, 1-Wire short, and search direction taken) through
the 1-Wire Master Status register and data through the
1-Wire Read Data register. All registers, the user memory
and a scratchpad are located in a linear address space
for direct access. The DS2465 communicates with a host
Pin Description
PIN
1
NAME FUNCTION
GND
IO
Ground Reference
I/O Driver for 1-Wire Line
2
3
V
Power-Supply Input
CC
Active-Low Control Input. Activates the
low-power sleep mode and issues a
device reset of the SHA-coprocessor and
the 1-Wire master (equivalent to the
1-Wire Master Reset command).
4
SLPZ
2
I C Serial-Data Input/Output. Must be
5
6
SDA
SCL
connected to V
through a pullup
CC
2
processor through its I C bus interface in standard mode
or in fast mode. See Figure 1 for a block diagram.
resistor.
2
I C Serial-Clock Input. Must be connect-
ed to V
through a pullup resistor.
CC
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