Datasheet > DS2460S+T&R

DS2460S+T&R

更新时间： 2024-02-09 19:50:09

品牌	Logo	应用领域
达拉斯 - DALLAS		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
8页	133K
描述
SHA-1 Coprocessor with EEPROM

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DS2460S+T&R 技术参数

Abridged Data Sheet

DS2460

Since a 885Ω pullup resistor, as would be required to meet the rise time specification at 400pF bus capacitance, is

lower than R_PMINat 5.5V, a different approach is necessary. The "Max. Load…" line in Figure 11 is generated by

first calculating the minimum pullup resistor at any given operating voltage ("Minimum R_P" line) and then calculating

the respective bus capacitance that yields a rise time of 300ns.

Only for pullup voltages of 3V and lower can the maximum permissible bus capacitance of 400pF be maintained. A

reduced bus capacitance of 300pF is acceptable for pullup voltages of 4V and lower. For fast speed operation at

any pullup voltage, the bus capacitance must not exceed 200pF. The corresponding pullup resistor value at the

voltage is indicated by the "Minimum R_P" line.

Figure 11. I²C Fast Speed Pullup Resistor Selection Chart

"Minimum Rp"

Max. Load at Min. Rp fast mode

2000

1600

1200

800

400

500

400

300

200

100

Pull-up Voltage

PACKAGE INFORMATION

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to

www.maxim-ic.com/DallasPackInfo.)

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