Datasheet > 微控制器和处理器 > 其他 uPs/uCs/外围集成电路> DS2460S+T&R

DS2460S+T&R

更新时间： 2024-01-24 23:44:38

品牌	Logo	应用领域
美信 - MAXIM		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
9页	211K
描述
Microprocessor Circuit, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOP-8

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DS2460S+T&R 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	SOP, SOP8,.25	针数：	8
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.31.00.01	Factory Lead Time：	6 weeks
风险等级：	1.3	JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e3	长度：	4.9 mm
湿度敏感等级：	1	端子数量：	8
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP8,.25	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	峰值回流温度（摄氏度）：	260
电源：	3/5 V	认证状态：	Not Qualified
座面最大高度：	1.75 mm	子类别：	Other Microprocessor ICs
最大压摆率：	0.5 mA	最大供电电压：	5.5 V
最小供电电压：	2.7 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn)	端子形式：	GULL WING
端子节距：	1.27 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	3.9 mm
uPs/uCs/外围集成电路类型：	MICROPROCESSOR CIRCUIT	Base Number Matches：	1

DS2460S+T&R 数据手册

Abridged Data Sheet

DS2460

Figure 1. Block Diagram

64-bit Unique

Number

MAC Output

Buffer

64-Byte Input

Buffer

SCL

2-wire

Function

Control

SDA

ADx

Command Buffer

and SHA-1

Engine Control

SHA-1

Engine

S-Secret

E-Secret1

E-Secret2

E-Secret3

8-Byte EEPROM

Write Buffer

112-Byte User

EEPROM

DETAILED REGISTER DESCRIPTION

For this section (including Figure 3) please refer to the full version of the data sheet.

DEVICE OPERATION

The typical use of the DS2460 in an application involves writing, reading, running the SHA-1 engine, transferring

secrets and comparing MACs. All these activities are controlled through the I²C serial interface.

I²C Serial Communication Interface

General Characteristics

The I²C bus uses a data line (SDA) plus a clock signal (SCL) for communication. Both SDA and SCL are bidirec-

tional lines, connected to a positive supply voltage through a pullup resistor. When there is no communication, both

lines are HIGH. The output stages of devices connected to the bus must have an open-drain or open-collector to

perform the wired-AND function. Data on the I²C bus can be transferred at rates of up to 100kbps in the Standard-

mode, up to 400kbps in the Fast-mode. The DS2460 works in both modes.

A device that sends data on the bus is defined as a transmitter, and a device receiving data as a receiver. The

device that controls the communication is called a “master.” The devices that are controlled by the master are

“slaves.” To be individually accessed, each device must have a slave address that does not conflict with other

devices on the bus.

Data transfers may be initiated only when the bus is not busy. The master generates the serial clock (SCL),

controls the bus access, generates the START and STOP conditions, and determines the number of data bytes

transferred between START and STOP (Figure 4). Data is transferred in bytes with the most significant bit being

transmitted first. After each byte follows an acknowledge bit to allow synchronization between master and slave.

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DS2460S+T&R	DALLAS	SHA-1 Coprocessor with EEPROM	获取价格
DS2460SR	MAXIM	SHA-1 Coprocessor with EEPROMAbridged Data Sheet	获取价格
DS2460ST	MAXIM	SHA-1 Coprocessor with EEPROMAbridged Data Sheet	获取价格
DS2465	MAXIM	SHA-256 Coprocessor with 1-Wire Master Function	获取价格
DS2465	ADI	DeepCover安全认证器具有SHA-256协处理器和1-Wire主机功能	获取价格
DS2465_13	MAXIM	DeepCover Secure Authenticator with SHA-256 Coprocessor and 1-Wire Master Function	获取价格

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