Datasheet > DS2408S/T&R

DS2408S/T&R

更新时间： 2024-01-09 03:08:49

品牌	Logo	应用领域
美信 - MAXIM		光电二极管外围集成电路
页数	文件大小	规格书
36页	539K
描述
Parallel I/O Port, 8 I/O, CMOS, PDSO16, 0.150 INCH, SOP-16

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DS2408S/T&R 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	SOIC	包装说明：	0.150 INCH, SOP-16
针数：	16	Reach Compliance Code：	not_compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.36	JESD-30 代码：	R-PDSO-G16
JESD-609代码：	e0	长度：	9.9 mm
I/O 线路数量：	8	端口数量：	1
端子数量：	16	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	峰值回流温度（摄氏度）：	245
认证状态：	Not Qualified	座面最大高度：	1.75 mm
最大供电电压：	5.25 V	最小供电电压：	2.8 V
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	1.27 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	3.9 mm
uPs/uCs/外围集成电路类型：	PARALLEL IO PORT, GENERAL PURPOSE	Base Number Matches：	1

DS2408S/T&R 数据手册

DS2408

System Requirement

Note 1:

Note 2:

Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the

system and 1-Wire recovery times. The specified value here applies to systems with only one

device and with the minimum 1-Wire recovery times. For more heavily loaded systems, an

active pullup such as that found in the DS2480B may be required.

If a 2.2kꢀ resistor is used to pull up the data line to V_PUP, 5µs after power has been applied,

the parasite capacitance does not affect normal communications.

Guaranteed by design—not production tested.

Note 3:

Note 4:

Note 5:

Note 6:

Note 7:

V_TL, V_THare a function of the internal supply voltage.

Voltage below which, during a falling edge on I/O, a logic '0' is detected.

The voltage on I/O needs to be less or equal to V_ILMAXwhenever the master drives the line

low.

Voltage above which, during a rising edge on I/O, a logic '1' is detected.

After V_THis crossed during a rising edge on I/O, the voltage on I/O has to drop by V_HYto be

detected as logic '0'.

Note 8:

Note 9:

The I-V characteristic is linear for voltages less than 1V.

Note 10:

Note 11:

The earliest recognition of a negative edge is possible at t_REHafter V_THhas been reached

before.

Highlighted numbers are NOT in compliance with the published 1-Wire standards. See

comparison table below.

Note 12:

Note 13:

Interval during the negative edge on I/O at the beginning of a presence detect pulse between

the time at which the voltage is 90% of V_PUPand the time at which the voltage is 10% of

V_PUP

Note 14:

Note 15:

Note 16:

ꢁ represents the time required for the pullup circuitry to pull the voltage on I/O up from V_IL

to V_TH.

ꢂ represents the time required for the pullup circuitry to pull the voltage on I/O up from V_IL

to the input high threshold of the bus master.

Interval during the device-generated negative edge on any PIO pin or the RSTZ pin between

the time at which the voltage is 90% of V_PUPand the time at which the voltage is 10% of

_PUP. PIO pullup resistor = 2.2kꢀ.

Width of the narrowest pulse which trips the activity latch (for any PIO pin) or causes a reset

(for the RSTZ pin). For a pulse duration t_PW: If t_PW< t_PWMIN(min), the pulse will be rejected. If

Note 17:

Note 18:

_PWMIN(min)< t_PW< t_PWMIN(max), the pulse may or may not be rejected. If t_PW> t_PWMIN(max)the

pulse will be recognized and latched.

Maximum instantaneous pulldown current through all port pins and the RSTZ pin combined.

No requirement for current balance among different pins.

STANDARD VALUES

DS2408 VALUES

PARAMETER

NAME

STANDARD

SPEED

OVERDRIVE

SPEED

STANDARD

SPEED

MIN MAX

OVERDRIVE

SPEED

MIN

MAX

(undef.)

60µs

240µs

120µs

60µs

MIN

7µs

MAX

MIN

10µs

53µs

2µs

MAX

(undef.)

80µs

7µs

t_SLOT(incl. t_REC

t_RSTL

)

61µs

480µs

15µs

60µs

15µs

(undef.) 65µs ¹⁾(undef.)

48µs

2µs

80µs

6µs

24µs

16µs

6µs

660µs

15µs

60µs

15µs

720µs

60µs

280µs

120µs

60µs

t_PDH

t_PDL

t_W0L

8µs

6µs

7µs

27µs

13µs

8µs

t_SLS, t_SPD

2µs

1.8µs

¹⁾Intentional change, longer recovery-time requirement due to modified 1-Wire front end.

4 of 36

1 2 345 6 7...36

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DS2408S+	MAXIM	Parallel I/O Port, 8 I/O, CMOS, PDSO16, 0.150 INCH, ROHS COMPLIANT, SOP-16	获取价格
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