DS2174

更新时间： 2024-01-02 13:09:01

品牌	Logo	应用领域
美信 - MAXIM		/
页数	文件大小	规格书
24页	119K
描述
EBERT

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技术参数
数据手册

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DS2174 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	LCC
包装说明：	QCCJ, LDCC44,.7SQ	针数：	44
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.68	JESD-30 代码：	S-PQCC-J44
JESD-609代码：	e3	长度：	16.585 mm
湿度敏感等级：	3	功能数量：	1
端子数量：	44	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	QCCJ	封装等效代码：	LDCC44,.7SQ
封装形状：	SQUARE	封装形式：	CHIP CARRIER
峰值回流温度（摄氏度）：	260	电源：	3.3 V
认证状态：	Not Qualified	座面最大高度：	4.57 mm
子类别：	Other Telecom ICs	最大压摆率：	0.06 mA
标称供电电压：	3.3 V	表面贴装：	YES
电信集成电路类型：	TELECOM CIRCUIT	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn)	端子形式：	J BEND
端子节距：	1.27 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	16.585 mm
Base Number Matches：	1

DS2174 数据手册

DS2174

1.2 Pattern Synchronization

Synchronization

The receiver synchronizes to the same pattern that is being transmitted. The pattern must be error free

when the synchronizer is online. Once synchronized, an error density of 6 bits in 64 causes the receiver to

declare loss of pattern sync, set the RLOS bit, and the synchronizer comes back online.

Polynomial Synchronization

Synchronization to polynomial patterns take 50 + n clock cycles (14 + n in nibble mode, 8 + n in byte

mode), where n is the exponent in the polynomial that describes the pattern. Once synchronized, any bit

that does not match the polynomial is counted as a bit error.

Repetitive Pattern Synchronization

Synchronization to repetitive patterns can take several complete repetitions of the entire pattern. The

actual sync time depends on the nature of the pattern and the location of the synchronization pointer.

Errors that occur during synchronization could affect the sync time; at least one complete error-free

repetition must be received before synchronization is declared. Once synchronized, any bit that does not

match the pattern that is programmed in the on-board RAM is counted as a bit error.

1.3 Bit Error Rate (BER) Calculation

Counters

The bit counter is active at all times. Once synchronized, the error counters come online. The receiver has

large 48-bit count registers. These counters accumulate for 50,640 hours at the T1 line rate, 1.544MHz,

and 38,170 hours at the E1 line rate, 2.048MHz. At higher clock rates, the counters saturate quicker, but

at the T3 line rate, the counter still runs for almost 1500 hours, and at 155MHz it runs for 504 hours.

To accumulate BER data, the user toggles the LC bit at T = 0. This clears the accumulators and loads the

contents into the count registers. At T = 0, these results should be ignored. At this point, the device is

counting bits and bit errors. At the end of the specified time interval, the user toggles the LC bit again and

reads the count registers. These are the valid results used to calculate a bit error rate. Remember, the bit

counter is really counting clocks, so in nibble and byte modes the bit counter value needs to be multiplied

by 4 or 8 to get the correct bit count. For longer integration periods, the results of multiple read cycles

have to be accumulated in software.

1.4 Generating Errors

Through Control Register 2, the user can intentionally inject a particular error rate into the transmitted

data stream. Injecting errors allows users to stress communication links and to check the functionality of

error monitoring equipment along the path.

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与DS2174相关器件

型号	品牌	描述	获取价格	数据表
DS2174DK	ETC	Enhanced Bit Error-Rate Tester Design Kit	获取价格
DS2174Q	MAXIM	EBERT	获取价格
DS2174Q/T&R	MAXIM	Telecom Circuit, 1-Func, PQCC44, PLASTIC, LCC-44	获取价格
DS2174Q/T&R+	MAXIM	Telecom Circuit, 1-Func, PQCC44, PLASTIC, LCC-44	获取价格
DS2174Q+	MAXIM	Telecom Circuit, 1-Func, PQCC44, PLASTIC, LCC-44	获取价格
DS2174Q+T&R	MAXIM	Telecom Circuit, 1-Func, PQCC44, PLASTIC, LCC-44	获取价格

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