Datasheet > DS1743P-85+

DS1743P-85+

更新时间： 2024-02-06 01:01:04

品牌	Logo	应用领域
美信 - MAXIM		时钟双倍数据速率外围集成电路
页数	文件大小	规格书
16页	197K
描述
Real Time Clock, Non-Volatile, 0 Timer(s), CMOS, ROHS COMPLIANT, POWERCAP MODULE-34

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技术参数
数据手册

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DS1743P-85+ 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	DMA
包装说明：	, MODULE,34LEAD,1.0	针数：	34
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8473.30.11.80	Factory Lead Time：	1 week
风险等级：	5.62	其他特性：	A POWERCAP MODULE CONTAINING CRYSTAL AND BATTERY REQUIRED
最大时钟频率：	0.032 MHz	外部数据总线宽度：	8
信息访问方法：	PARALLEL, DIRECT ADDRESS	中断能力：	N
JESD-30 代码：	R-XDMA-U34	JESD-609代码：	e3
端子数量：	34	计时器数量：
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	UNSPECIFIED	封装等效代码：	MODULE,34LEAD,1.0
封装形状：	RECTANGULAR	封装形式：	MICROELECTRONIC ASSEMBLY
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	5 V
认证状态：	Not Qualified	子类别：	Timer or RTC
最大供电电压：	5.5 V	最小供电电压：	4.5 V
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	Matte Tin (Sn)	端子形式：	J INVERTED
端子位置：	DUAL	最短时间：	SECONDS
处于峰值回流温度下的最长时间：	NOT SPECIFIED	易失性：	NO
uPs/uCs/外围集成电路类型：	TIMER, REAL TIME CLOCK	Base Number Matches：	1

DS1743P-85+ 数据手册

DS1743/DS1743P Y2K-Compliant, Nonvolatile Timekeeping RAMs

WRITING DATA TO RAM OR CLOCK

The DS1743 is in the write mode whenever WE, and CE are in their active state. The start of a write is

referenced to the latter occurring transition of WE, on CE. The addresses must be held valid throughout the

cycle. CE or WE must return inactive for a minimum of t_WRprior to the initiation of another read or write

cycle. Data in must be valid t_DSprior to the end of write and remain valid for t_DHafterward. In a typical

application, the OE signal will be high during a write cycle. However, OE can be active provided that care

is taken with the data bus to avoid bus contention. If OE is low prior to WE transitioning low the data bus

can become active with read data defined by the address inputs. A low transition on WE will then disable

the outputs t_WEZafter WE goes active.

DATA-RETENTION MODE

The 5V device is fully accessible and data can be written or read only when VCC is greater than VPF.

However, when V_CCis below the power-fail point, V_PF, (point at which write protection occurs) the

internal clock registers and SRAM are blocked from any access. At this time (PowerCap only) the power-

fail reset-output signal (RST) is driven active and remains active until V_CCreturns to nominal levels. When

V_CCfalls below the battery switch point V_SO(battery supply level), device power is switched from the V_CC

in to the backup battery. RTC operation and SRAM data are maintained from the battery until V_CCis

returned to nominal levels.

The 3.3V device is fully accessible and data can be written or read only when V_CCis greater than V_PF

When V_CCfalls below the power-fail point, V_PF, access to the device is inhibited. At this time the power-

fail reset-output signal (RST) is driven active and remains active until V_CCreturns to nominal levels. If V_PF

is less than V_SO, the device power is switched from V_CCto the backup supply (V_BAT) when V_CCdrops

below V_PF. If V_PFis greater than V_SO, the device power is switched from V_CCto the backup supply (V_BAT

)

when V_CCdrops below V_SO. RTC operation and SRAM data are maintained from the battery until V_CCis

returned to nominal levels. The RST (PowerCap only) signal is an open-drain output and requires a pullup

resistor. Except for RST, all control, data, and address signals must be powered down when V_CCis

powered down.

BATTERY LONGEVITY

The DS1743 has a lithium power source that is designed to provide energy for clock activity and clock and

RAM data retention when the V_CCsupply is not present. The capability of this internal power supply is

sufficient to power the DS1743 continuously for the life of the equipment in which it is installed. For

specification purposes, the life expectancy is 10 years at +25C with the internal clock oscillator running in

the absence of V_CCpower. Each DS1743 is shipped from Dallas Semiconductor with its lithium energy

source disconnected, guaranteeing full energy capacity. When V_CCis first applied at a level greater than

V_PF, the lithium energy source is enabled for battery backup operation. Actual life expectancy of the

DS1743 will be longer than 10 years since no lithium battery energy is consumed when V_CCis present.

BATTERY MONITOR

The DS1743 constantly monitors the battery voltage of the internal battery. The battery flag bit (bit 7) of

the day register is used to indicate the voltage level range of the battery. This bit is not writeable and

should always be a 1 when read. If a 0 is ever present, an exhausted lithium energy source is indicated and

both the contents of the RTC and RAM are questionable.

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与DS1743P-85+相关器件

型号	品牌	描述	获取价格	数据表
DS1743P-C01+	MAXIM	Real Time Clock, Non-Volatile, 0 Timer(s), CMOS, LEAD FREE, POWERCAP MODULE-34	获取价格
DS1743W-120	DALLAS	Y2KC Nonvolatile Timekeeping RAM	获取价格
DS1743W-120	MAXIM	Real Time Clock, Non-Volatile, 0 Timer(s), CMOS, EDIP MODULE-28	获取价格
DS1743W-120+	MAXIM	Real Time Clock, Non-Volatile, 0 Timer(s), CMOS, ROHS COMPLIANT, EDIP MODULE-28	获取价格
DS1743W-120IND	MAXIM	Real Time Clock, Non-Volatile, 0 Timer(s), CMOS, EDIP MODULE-28	获取价格
DS1743W-120IND+	MAXIM	Y2K-Compliant, Nonvolatile Timekeeping RAMs	获取价格

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