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DS15MB200TSQ/NOPB PDF预览

DS15MB200TSQ/NOPB

更新时间: 2024-01-17 20:59:18
品牌 Logo 应用领域
德州仪器 - TI 驱动接口集成电路复用器驱动器
页数 文件大小 规格书
18页 437K
描述
具有预加重功能的双路 1.5Gbps 2:1/1:2 LVDS 多路复用器/缓冲器 | RHS | 48 | -40 to 85

DS15MB200TSQ/NOPB 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:HVQCCN, LCC48,.27SQ,20Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:3.31差分输出:YES
驱动器位数:2输入特性:DIFFERENTIAL SCHMITT TRIGGER
接口集成电路类型:LINE TRANSCEIVER接口标准:GENERAL PURPOSE
JESD-30 代码:S-PQCC-N48JESD-609代码:e3
长度:7 mm湿度敏感等级:3
功能数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装等效代码:LCC48,.27SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
最大接收延迟:2.5 ns接收器位数:2
座面最大高度:0.8 mm子类别:Other Interface ICs
最大压摆率:275 mA最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
最大传输延迟:2.5 ns宽度:7 mm
Base Number Matches:1

DS15MB200TSQ/NOPB 数据手册

 浏览型号DS15MB200TSQ/NOPB的Datasheet PDF文件第3页浏览型号DS15MB200TSQ/NOPB的Datasheet PDF文件第4页浏览型号DS15MB200TSQ/NOPB的Datasheet PDF文件第5页浏览型号DS15MB200TSQ/NOPB的Datasheet PDF文件第7页浏览型号DS15MB200TSQ/NOPB的Datasheet PDF文件第8页浏览型号DS15MB200TSQ/NOPB的Datasheet PDF文件第9页 
DS15MB200  
SNLS196E NOVEMBER 2005REVISED MARCH 2013  
www.ti.com  
Units  
Electrical Characteristics  
Over recommended operating supply and temperature ranges unless other specified.  
Symbol  
Parameter  
Conditions  
Min  
Typ(1)  
Max  
LVTTL DC SPECIFICATIONS (MUX_Sn, PREA_n, PREB_n, PREL_n, ENA_n, ENB_n, ENL_n)  
VIH  
VIL  
High Level Input Voltage  
Low Level Input Voltage  
High Level Input Current  
High Level Input Current  
Low Level Input Current  
Input Capacitance  
2.0  
GND  
10  
40  
VDD  
0.8  
V
V
IIH  
VIN = VDD = VDDMAX  
+10  
200  
+10  
µA  
µA  
µA  
pF  
pF  
V
IIHR  
IIL  
PREA_n, PREB_n, PREL_n  
VIN = VSS, VDD = VDDMAX  
Any Digital Input Pin to VSS  
Any Digital Output Pin to VSS  
ICL = 18 mA  
10  
CIN1  
COUT1  
VCL  
2.0  
4.0  
Output Capacitance  
Input Clamp Voltage  
1.5  
0.8  
LVDS INPUT DC SPECIFICATIONS (SIA±, SIB±, LI±)  
VTH  
Differential Input High Threshold(2)  
VCM = 0.8V or 1.2V or 3.55V,  
VDD = 3.6V  
0
0
100  
mV  
mV  
VTL  
Differential Input Low Threshold(2)  
VCM = 0.8V or 1.2V or 3.55V,  
VDD = 3.6V  
100  
VID  
Differential Input Voltage  
Common Mode Voltage Range  
Input Capacitance  
VCM = 0.8V to 3.55V, VDD = 3.6V  
VID = 150 mV, VDD = 3.6V  
IN+ or INto VSS  
100  
2400  
3.55  
mV  
V
VCMR  
CIN2  
IIN  
0.05  
2.0  
pF  
µA  
µA  
Input Current  
VIN = 3.6V, VDD = VDDMAX or 0V  
VIN = 0V, VDD = VDDMAX or 0V  
15  
15  
+15  
+15  
LVDS OUTPUT DC SPECIFICATIONS (SOA_n±, SOB_n±, LO_n±)  
VOD  
Differential Output Voltage,  
0% Pre-emphasis(2)  
RL is the internal 100between OUT+  
and OUT−  
250  
360  
500  
mV  
ΔVOD  
Change in VOD between  
Complementary States  
Offset Voltage(3)  
-35  
1.05  
-35  
35  
1.475  
35  
mV  
V
VOS  
1.22  
ΔVOS  
Change in VOS between  
Complementary States  
mV  
mA  
pF  
IOS  
Output Short Circuit Current  
Output Capacitance  
OUT+ or OUTShort to GND  
21  
-40  
COUT2  
OUT+ or OUTto GND when TRI-  
STATE  
4.0  
SUPPLY CURRENT (Static)  
ICC  
Supply Current  
All inputs and outputs enabled and  
active, terminated with external load of  
100between OUT+ and OUT-.  
225  
0.6  
275  
4.0  
mA  
mA  
ICCZ  
Supply Current - Powerdown Mode  
ENA_0 = ENB_0 = ENL_0 = ENA_1 =  
ENB_1 = ENL_1 = L  
SWITCHING CHARACTERISTICS—LVDS OUTPUTS  
tLHT  
Differential Low to High Transition  
Time  
Use an alternating 1 and 0 pattern at 200  
170  
170  
1.0  
250  
250  
2.5  
ps  
ps  
ns  
Mb/s, measure between 20% and 80% of  
(4)  
VOD  
.
tHLT  
Differential High to Low Transition  
Time  
tPLHD  
tPHLD  
Differential Low to High Propagation Use an alternating 1 and 0 pattern at 200  
Delay  
Mb/s, measure at 50% VOD between  
input to output.  
Differential High to Low Propagation  
Delay  
1.0  
25  
50  
2.5  
75  
ns  
ps  
ps  
(4)  
tSKD1  
tSKCC  
Pulse Skew  
|tPLHD–tPHLD|  
Output Channel to Channel Skew  
Difference in propagation delay (tPLHD or  
tPHLD) among all output channels.(4)  
115  
(1) Typical parameters are measured at VDD = 3.3V, TA = 25°C. They are for reference purposes, and are not production-tested.  
(2) Differential output voltage VOD is defined as ABS(OUT+–OUT). Differential input voltage VID is defined as ABS(IN+–IN).  
(3) Output offset voltage VOS is defined as the average of the LVDS single-ended output voltages at logic high and logic low states.  
(4) Not production tested. Guaranteed by statistical analysis on a sample basis at the time of characterization.  
6
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Product Folder Links: DS15MB200  

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