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DS15BR400TSQ

更新时间： 2024-02-19 06:57:55

品牌	Logo	应用领域
美国国家半导体 - NSC		线路驱动器或接收器驱动程序和接口接口集成电路中继器
页数	文件大小	规格书
11页	645K
描述
4-Channel LVDS Buffer/Repeater with Pre-Emphasis

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技术参数
数据手册

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DS15BR400TSQ 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	包装说明：	TFQFP, TQFP48,.35SQ
Reach Compliance Code：	compliant	ECCN代码：	5A991.B.1
HTS代码：	8542.39.00.01	Factory Lead Time：	6 weeks
风险等级：	1.25	Samacsys Description：	LVDS Interface IC 4ch LVDS Buffer/Repeater
差分输出：	YES	驱动器位数：	4
输入特性：	DIFFERENTIAL	接口集成电路类型：	LINE TRANSCEIVER
接口标准：	GENERAL PURPOSE	JESD-30 代码：	S-PQFP-G48
JESD-609代码：	e3	长度：	7 mm
湿度敏感等级：	3	功能数量：	4
端子数量：	48	最高工作温度：	85 °C
最低工作温度：	-40 °C	最小输出摆幅：	2 V
输出特性：	DIFFERENTIAL	最大输出低电流：	0.00001 A
输出极性：	COMPLEMENTARY	封装主体材料：	PLASTIC/EPOXY
封装代码：	TFQFP	封装等效代码：	TQFP48,.35SQ
封装形状：	SQUARE	封装形式：	FLATPACK, THIN PROFILE, FINE PITCH
峰值回流温度（摄氏度）：	260	电源：	3.3 V
认证状态：	Not Qualified	最大接收延迟：	2 ns
接收器位数：	4	座面最大高度：	1.2 mm
子类别：	Line Driver or Receivers	最大压摆率：	215 mA
最大供电电压：	3.6 V	最小供电电压：	3 V
标称供电电压：	3.3 V	电源电压1-最大：	3.6 V
电源电压1-分钟：	3 V	电源电压1-Nom：	3.3 V
表面贴装：	YES	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn)	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	最大传输延迟：	2 ns
宽度：	7 mm

DS15BR400TSQ 数据手册

Electrical Characteristics (Continued)

Over recommended operating supply and temperature ranges unless other specified.

Typ

(Note

Symbol

Parameter

Conditions

Min

Max Units

LVDS OUTPUT DC SPECIFICATIONS (OUTn )

V_OD

Differential Output Voltage, R_L= 100Ω external resistor between OUT+ and OUT−

250

360

500

0% Pre-emphasis (Note 6)

Change in V_ODbetween

Complementary States

Offset Voltage (Note 7)

Change in V_OSbetween

Complementary States

LVDS Output Capacitance

Figure 1

∆V_OD

−35

1.05

−35

V_OS

1.18 1.475

∆V_OS

C_OUT

I_OS

OUT+ or OUT− to V_SS

2.5

Output Short Circuit Current OUT+ or OUT− Short to GND

OUT+ or OUT− Short to VDD

−21

−40

SUPPLY CURRENT (Static)

I_CC

Supply Current

All inputs and outputs enabled and active, terminated

with differential load of 100Ω between OUT+ and OUT-.

PEM = L

175

215

200

µA

I_CCZ

Supply Current - Power

Down Mode

PWDN = L, PEM = L

SWITCHING CHARACTERISTICS—LVDS OUTPUTS

t_LHT

Differential Low to High

Transition Time (Note 12)

Differential High to Low

Transition Time (Note 12)

Differential Low to High

Propagation Delay

Use an alternating 1 and 0 pattern at 200 Mbps, measure

170

1.0

250

2.0

between 20% and 80% of V_OD

Figures 2, 4

t_HLT

t_PLHD

t_PHLD

Use an alternating 1 and 0 pattern at 200 Mbps, measure

at 50% V_ODbetween input to output.

Figures 2, 3

Differential High to Low

Propagation Delay

1.0

2.0

t_SKD1

t_SKCC

Pulse Skew (Note 12)

|t_PLHD–t_PHLD|

Output Channel to Channel Difference in propagation delay (t_PLHDor t_PHLD) among

Skew (Note 12) all output channels.

Part to Part Skew (Note 12) Common edge, parts at same temp and V_CC

t_SKP

t_JIT

550

1.5

Jitter (0% Pre-emphasis)

(Note 8)

RJ - Alternating 1 and 0 at 750 MHz (Note 9)

DJ - K28.5 Pattern, 1.5 Gbps (Note 10)

TJ - PRBS 2²³-1 Pattern, 1.5 Gbps (Note 11)

Time from PWDN to OUT change from TRI-STATE to

active.

0.5

t_ON

LVDS Output Enable Time

µs

Figures 5, 6

t_OFF

LVDS Output Disable Time Time from PWDN to OUT change from active to

TRI-STATE.

Figures 5, 6

Note 5: Typical parameters are measured at V

= 3.3V, T = 25˚C. They are for reference purposes, and are not production-tested.

Note 6: Differential output voltage V

is defined as ABS(OUT+–OUT−). Differential input voltage V is defined as ABS(IN+–IN−).

Note 7: Output offset voltage V

is defined as the average of the LVDS single-ended output voltages at logic high and logic low states.

Note 8: Jitter is not production tested, but guaranteed through characterization on a sample basis.

Note 9: Random Jitter, or RJ, is measured RMS with a histogram including 1500 histogram window hits. Stimulus and fixture Jitter has been subtracted. The input

voltage = V = 500 mV, input common mode voltage = V = 1.2V, 50% duty cycle at 750 MHz, t = t = 50 ps (20% to 80%).

ICM

Note 10: Deterministic Jitter, or DJ, is a peak to peak value. Stimulus and fixture jitter has been subtracted. The input voltage = V = 500 mV, input common mode

voltage = V

= 1.2V, K28.5 pattern at 1.5 Gbps, t = t = 50 ps (20% to 80%). The K28.5 pattern is repeating bit streams of (0011111010 1100000101).

ICM

r f

Note 11: Total Jitter, or TJ, is measured peak to peak with a histogram including 3500 window hits. Stimulus and fixture Jitter has been subtracted. The input voltage

= V = 500 mV, input common mode voltage = V

= 1.2V, 2 -1 PRBS pattern at 1.5 Gbps, t = t = 50 ps (20% to 80%).

ICM

r f

Note 12: Not production tested. Guaranteed by a statistical analysis on a sample basis at the time of characterization.

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与DS15BR400TSQ相关器件

型号	品牌	描述	获取价格	数据表
DS15BR400TSQ/NOPB	NSC	IC LINE TRANSCEIVER, QCC32, LLP-32, Line Driver or Receiver	获取价格
DS15BR400TSQ/NOPB	TI	具有预加重功能的 4 通道 LVDS 缓冲器/中继器 \| RTV \| 32 \| -40 t	获取价格
DS15BR400TSQX	NSC	4-Channel LVDS Buffer/Repeater with Pre-Emphasis	获取价格
DS15BR400TVS	TI	具有预加重功能的 4 通道 LVDS 缓冲器/中继器 \| PFB \| 48 \| -40 t	获取价格
DS15BR400TVS	NSC	4-Channel LVDS Buffer/Repeater with Pre-Emphasis	获取价格
DS15BR400TVS/NOPB	TI	具有预加重功能的 4 通道 LVDS 缓冲器/中继器 \| PFB \| 48 \| -40 t	获取价格

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