DP83867IR, DP83867CR
ZHCSDE3G –FEBRUARY 2015 –REVISED OCTOBER 2022
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• Changed table name from 'RGZ Speed Select Strap Details' to 表8-6 .......................................................... 51
• Changed 'SPEED_SEL' to 'ANEG_SEL' in 表8-6 ...........................................................................................51
• Changed Default state of from 'Strap' to '0' for bit 13 in 表8-9 ........................................................................59
• Changed Default state of from 'Strap' to '1' for bit 6 in 表8-9 ..........................................................................59
• Changed bit 9 name from 100BASE-T FULL DUPLEX to 1000BASE-T FULL DUPLEX in 表8-18 ............... 69
• Changed bit 9 descriptions from half duplex to full duplex in 表8-18 ..............................................................69
• Changed 'Interrupt Status and Event Control Register (ISR)' to 'MII Interrupt Control Register (MICR)' in 节
8.6.16 ...............................................................................................................................................................75
• Changed Register definition to move a statement from 节8.6.17 to 节8.6.16 ............................................... 75
• Changed default of bit 9 from '1' to '0' in Configuration Register 2 (CFG2), Address 0x0014 .........................79
• Changed default of bits 5:0 from '0' to '0 0111' in 表8-27 ................................................................................79
• Added 节8.6.29 register...................................................................................................................................89
• Changed Name of Bits 6:5 from 'STRAP_SPEED_SEL' to 'STRAP_ANEG_SEL' in 表8-46 ......................... 94
• Changed Name of Bit 6 from 'RESERVED' to 'RESERVED (RGZ)' in 表8-46 ............................................... 94
• Changed Name of Bit 5 from 'STRAP_SPEED_SEL (PAP)' to 'STRAP_SPEED_SEL (RGZ)' in 表8-46 .......94
• Changed name of Bit 6:4 from 'RESERVED' to 'RESERVED (PAP)' in 表8-47 ..............................................95
• Added description for 'STRAP_RGMII_CLK_SKEW_TX (RGZ)' in 表8-47 .................................................... 95
• Changed name of Bit 2:0 from 'RESERVED' to 'RESERVED (PAP)' in 表8-47 ..............................................95
• Added description for 'STRAP_RGMII_CLK_SKEW_RX (RGZ)' in 表8-47 ....................................................95
• Changed default value of bit 4:0 from '10000' to 'TRIM' in 节8.6.97 .............................................................106
• Changed description for IO_IMPEDANCE_CTRL bits in 节8.6.97 ...............................................................106
• Changed 节10 section................................................................................................................................... 125
• Added "The 2.5-V VDDA2P5 can come up with or after the 1.8-V VDDA1P8 but not before it" to 节10 ......125
• Added 图10-3 ................................................................................................................................................125
• Added 表10-1 ................................................................................................................................................125
• Added note regarding 1.8-V supply sequence if no load exists on 2.5-V supply in Layout ........................... 125
Changes from Revision B (August 2015) to Revision C (November 2015)
Page
• 更改了标题以在数据表中添加DP83867IRRGZ/CRRGZ....................................................................................1
• 添加了器件型号...................................................................................................................................................1
• 更改了节1 中的延迟要点以更好地描述低延迟特性........................................................................................... 1
• 更改了特性部分中的功耗数值............................................................................................................................1
• 向节1 添加了辐射发射性能............................................................................................................................... 1
• 向节1 添加了MDI 终端电阻器.......................................................................................................................... 1
• 添加了可编程MAC 接口阻抗至.......................................................................................................................... 1
• 向节1 添加了“RJ45 镜像模式”......................................................................................................................1
• 向节1 添加了兼容性..........................................................................................................................................1
• 更改了节1 以将“亮点”与“主要规格”合并为一部分....................................................................................1
• 删除了节1 中的双电压规格............................................................................................................................... 1
• 向节1 添加了RGZ 器件的双电源电压.............................................................................................................. 1
• 删除了节1 中的自动交叉要点............................................................................................................................1
• 删除了重复的低延迟规格.................................................................................................................................... 1
• 删除了主要规范中的MDIO 要点.........................................................................................................................1
• 向说明添加了MAC 接口信息.............................................................................................................................1
• 向说明添加了QFN 功耗.................................................................................................................................... 1
• 向器件信息表添加了新器件的封装信息..............................................................................................................1
• Added Device Comparison Table....................................................................................................................... 8
• Changed Pin Functions table to add information about new RGZ devices...................................................... 10
• Changed bypass capacitor information for power pins in Pin Functions table................................................. 10
• Added information about pull-up pull-down resistors in the table note of the table ......................................... 10
• Added Unused Pins section .............................................................................................................................14
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