DP83867IR, DP83867CR
ZHCSDE3G –FEBRUARY 2015 –REVISED OCTOBER 2022
www.ti.com.cn
Changes from Revision * (February 2015) to Revision A (June 2015)
Page
• 将文档标题从“稳健型低功耗”更改为“稳健型高抗扰性”.............................................................................. 1
• 更改了“亮点”下所列的节1 ............................................................................................................................1
• 更改了节2 列表................................................................................................................................................. 1
• 更改了节3 文本和布局...................................................................................................................................... 1
• Added storage temperature to 节7.1 .............................................................................................................. 15
• Added TF fall time = 0.75 ns (Max) in 节7.9 ....................................................................................................19
• Added T4, MDI to GMII Latency = 264 ns (NOM) to 节7.11. .......................................................................... 20
• Added section 节8.3.2.1 ................................................................................................................................. 36
• Moved text From the end of 表8-9 To 节8.6.3 ................................................................................................62
• Changed format of loopback control bits in 表8-29 "BIST Control Register (BISCR)" ....................................80
• Changed BIT NAME (11:8) From: "LED_ACT_SEL To: LED_2_SEL in 表8-31 ............................................. 82
• Changed BIT NAME (7:4) From: "LED_SPD_SEL To: LED_1_SEL in 表8-31 ...............................................82
• Changed BIT NAME (3:0 From: "LED_LNK_SEL To: LED_0_SEL in 表8-31 ................................................ 82
• Added 节8.6.36 register...................................................................................................................................93
• Changed the title of 表8-47 from: Address 0x006FE to: Address 0x006F ......................................................95
• Added 节8.6.48 register...................................................................................................................................98
• Changed default of bits 12:8 to 0 1100 in 表8-106 ....................................................................................... 106
• Deleted text "of the 64-HTQFP package" from the second paragraph in section 节9.2.1.1 ......................... 119
• Deleted text "for MII Mode" from the second paragraph in section 节9.2.1.2 ...............................................121
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
7
Product Folder Links: DP83867IR DP83867CR