DP83867IR, DP83867CR
ZHCSDE3G –FEBRUARY 2015 –REVISED OCTOBER 2022
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• Added table note explaining how Duty Cycle % must be interpreted in 节7.9 ................................................19
• Added table note explaining how Duty Cycle % must be interpreted in 节7.9 ................................................19
• Changed 图7-10 ............................................................................................................................................. 21
• Changed statement about PHY address in 节8.4.2 ........................................................................................41
• Added 图8-11 ..................................................................................................................................................46
• Deleted "The BIST allows full control of the packet lengths and of the IPG." from 节8.4.5 ............................48
• Deleted mention of ALCD from 节8.4.6 .......................................................................................................... 48
• Deleted subsection describing ALCD from 节8.4.6 ........................................................................................ 48
• Added sentence about the polarity of MDI signals in 节8.4.6.5 ......................................................................49
• Changed 'CRS' strap function from "Fast Link Detect" to "Fast Link Drop" in 表8-4 ...................................... 51
• Changed notes after 表8-4 to be table notes referenced within the table. ......................................................51
• Added definition for register Bit Name type 'Strap' in 节8.6 ............................................................................59
• Deleted Advanced Link Cable Diagnostics Control Register (ALCD_CTRL) .................................................. 59
• Added PAP package default for '1000BASE-T FULL DUPLEX' in 节8.6.10 ...................................................69
• Changed 'MDI_CROSSOVER' default in 节8.6.14 .........................................................................................72
• Added PAP package default for 'SPEED_OPT_EN' in 节8.6.18 .....................................................................79
• Added 节8.6.28 ...............................................................................................................................................88
• Changed descriptions of 'FORCE_DROP' and 'FLD_EN' in 节8.6.29 ............................................................89
• Added 节8.6.30 ...............................................................................................................................................90
• Added 'INT_TST_MODE_1' to 节8.6.31 .........................................................................................................90
• Changed 'PORT_MIRROR_EN' default in 节8.6.31 ....................................................................................... 90
• Added PAP package default for 'RGMII_EN' in 节8.6.32 ................................................................................90
• Added 节8.6.35 ...............................................................................................................................................93
• Changed description of 'STRAP_FLD' from "Fast Link Detect" to "Fast Link Drop" in 节8.6.38 .....................95
• Added 节8.6.41 ...............................................................................................................................................96
• Added 节8.6.42 ...............................................................................................................................................96
• Added RGZ package default for 'RGMII_TX_DELAY_CTRL' in 节8.6.44 .......................................................97
• Added RGZ package default for 'RGMII_RX_DELAY_CTRL' in 节8.6.44 ...................................................... 97
• Added 节8.6.47 ...............................................................................................................................................97
• Added 节8.6.51 ...............................................................................................................................................98
• Changed capacitor value in 图9-2 and added footnotes................................................................................119
• Added requirements for 2.5-V clock source capacitors in 节9.2.1.2 .............................................................121
• Added 图9-4 ..................................................................................................................................................121
• Added "RMS Jitter" to 表9-2 ......................................................................................................................... 121
• Added 节9.2.1.4 ............................................................................................................................................123
• Changed capacitor placement in 图10-1 and footnote about decoupling capacitor placement.....................125
• Changed capacitor placement in 图10-2 and footnote about decoupling capacitor placement.....................125
Changes from Revision C (November 2015) to Revision D (July 2016)
Page
• Added '(Straps Required)' to RX_DV/RX_CTRL pin in Pin Functions table.....................................................10
• Changed '1nF' to '1µF' for VDD1P1 and VDD1P0 pin in Pin Functions table...................................................10
• Added Operating Junction Temperature to 节7.3 ........................................................................................... 15
• Changed parameter symbol from VIH to VIH in 节7.5 .....................................................................................16
• Added MDC toggling clarification to 节7.7 ......................................................................................................19
• Changed target strap voltage thresholds in 表8-3 .......................................................................................... 51
• Changed 'SPEED_SEL1' to 'ANEG_SEL1' in 表8-4 .......................................................................................51
• Added '(Straps Required)' to RX_DV/RX_CTRL in 表8-4 ...............................................................................51
• Changed 'SPEED_SEL0' to 'ANEG_SEL' in 表8-4 .........................................................................................51
• Changed 'SPEED_SEL0' to 'ANEG_SEL0' in 表8-4 .......................................................................................51
• Changed table name from 'PAP Speed Select Strap Details' to 表8-5 ........................................................... 51
• Changed 'SPEED_SEL0' and 'SPEED_SEL' to 'ANEG_SEL0' and 'ANEG_SEL1' in 表8-5 .......................... 51
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