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DMP3021SPDW PDF预览

DMP3021SPDW

更新时间: 2023-12-06 20:09:26
品牌 Logo 应用领域
美台 - DIODES /
页数 文件大小 规格书
8页 979K
描述
DUAL P-CHANNEL ENHANCEMENT MODE MOSFET

DMP3021SPDW 数据手册

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DMP3021SPDW  
Electrical Characteristics (@ TA = +25°C, unless otherwise specified.)  
Characteristic  
OFF CHARACTERISTICS (Note 9)  
Drain-Source Breakdown Voltage  
Zero Gate Voltage Drain Current  
Gate-Source Leakage  
Symbol  
Min  
Typ  
Max  
Unit  
Test Condition  
-30  
-1  
V
BVDSS  
IDSS  
VGS = 0V, ID = -250μA  
VDS = -30V, VGS = 0V  
VGS = ±25V, VDS = 0V  
μA  
μA  
±10  
IGSS  
ON CHARACTERISTICS (Note 9)  
Gate Threshold Voltage  
-1.0  
-2.5  
18  
V
mΩ  
V
VGS(th)  
RDS(on)  
VSD  
VDS = VGS, ID = -250μA  
VGS = -10V, ID = -8A  
VGS = -5V, ID = -5A  
VGS = 0V, IS = -1A  
9.8  
Static Drain-Source On-Resistance  
14.3  
-0.7  
28  
Diode Forward Voltage  
DYNAMIC CHARACTERISTICS (Note 10)  
Input Capacitance  
-1.2  
1799  
259  
225  
2.1  
pF  
pF  
pF  
Ciss  
Coss  
Crss  
Rg  
VDS = -15V, VGS = 0V,  
f = 1.0MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
VDS = 0V, VGS = 0V, f = 1.0MHz  
VDS = -15V, ID = -10A  
17.4  
34  
nC  
nC  
nC  
nC  
ns  
ns  
ns  
ns  
ns  
nC  
Total Gate Charge (VGS = -5V)  
Total Gate Charge (VGS = -10V)  
Gate-Source Charge  
Qg  
Qg  
5.1  
Qgs  
Qgd  
tD(on)  
tR  
Gate-Drain Charge  
8.4  
Turn-On Delay Time  
6.5  
Turn-On Rise Time  
18.3  
35.8  
23.7  
14.9  
15  
VDD = -15V, VGS = -10V,  
RG = 3, ID = -10A  
Turn-Off Delay Time  
tD(off)  
tF  
Turn-Off Fall Time  
Reverse Recovery Time  
Reverse Recovery Charge  
tRR  
IS = -8A, dI/dt = 500A/μs  
QRR  
Notes:  
5. Device mounted on FR-4 PC board, with minimum recommended pad layout, single sided.  
6. Device mounted on FR-4 substrate PC board, 2oz copper, with thermal bias to bottom layer 1-inch square copper plate.  
7. Thermal resistance from junction to soldering point (on the exposed drain pad).  
8. IAS and EAS ratings are based on low frequency and duty cycles to keep TJ = +25°C.  
9. Short duration pulse test used to minimize self-heating effect.  
10. Guaranteed by design. Not subject to product testing.  
3 of 8  
www.diodes.com  
April 2022  
© Diodes Incorporated  
DMP3021SPDW  
Document number: DS43466 Rev. 3 - 2  

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