June 1989
DM54LS251/DM74LS251
TRI-STATE Data Selectors/Multiplexers
É
General Description
Features
Y
TRI-STATE version of LS151
These data selectors/multiplexers contain full on-chip bina-
ry decoding to select one-of-eight data sources, and feature
a strobe-controlled TRI-STATE output. The strobe must be
at a low logic level to enable these devices. The TRI-STATE
outputs permit direct connection to a common bus. When
the strobe input is high, both outputs are in a high-imped-
ance state in which both the upper and lower transistors of
each totem-pole output are off, and the output neither drives
nor loads the bus significantly. When the strobe is low, the
outputs are activated and operate as standard TTL totem-
pole outputs.
Y
Interface directly with system bus
Y
Perform parallel-to-serial conversion
Y
Permit multiplexing from N-lines to one line
Y
Complementary outputs provide true and inverted data
Maximum number of common outputs
54LS 49
Y
Y
Y
74LS 129
Typical propagation delay time (D to Y)
54LS 17 ns
74LS 17 ns
To minimize the possibility that two outputs will attempt to
take a common bus to opposite logic levels, the output con-
trol circuitry is designed so that the average output disable
time is shorter than the average output enable time.
Typical power dissipation
54LS 35 mW
74LS 35 mW
Connection Diagram
Function Table
Dual-In-Line Package
Inputs
Select
Outputs
Strobe
S
Y
W
C
B
A
X
L
X
L
X
L
H
L
L
L
L
L
L
L
L
Z
Z
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
L
L
H
L
L
H
H
L
L
H
L
H
H
H
H
L
H
L
H
H
H
e
e
e
H
X
High Logic Level, L
Low Logic Level,
e
Don’t Care, Z
High Impedance (Off)
e
D0, D1 . . . D7
The level of the respective D input
TL/F/6415–1
Order Number DM54LS251J, DM54LS251W,
DM74LS251M or DM74LS251N
See NS Package Number J16A, M16A, N16E or W16A
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
TL/F/6415
RRD-B30M105/Printed in U. S. A.