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DM54LS283 PDF预览

DM54LS283

更新时间: 2024-01-26 15:40:27
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
8页 160K
描述
4-Bit Binary Adders with Fast Carry

DM54LS283 数据手册

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June 1989  
54LS283/DM54LS283/DM74LS283  
4-Bit Binary Adders with Fast Carry  
General Description  
Features  
Y
Full-carry look-ahead across the four bits  
These full adders perform the addition of two 4-bit binary  
numbers. The sum (R) outputs are provided for each bit and  
the resultant carry (C4) is obtained from the fourth bit.  
These adders feature full internal look ahead across all four  
bits. This provides the system designer with partial look-  
ahead performance at the economy and reduced package  
count of a ripple-carry implementation.  
Y
Systems achieve partial look-ahead performance with  
the economy of ripple carry  
Y
Typical add times  
Two 8-bit words 25 ns  
Two 16-bit words 45 ns  
Y
Y
Typical power dissipation per 4-bit adder 95 mW  
Alternate Military/Aerospace device (54LS283) is avail-  
able. Contact a National Semiconductor Sales Office/  
Distributor for specifications.  
The adder logic, including the carry, is implemented in its  
true form meaning that the end-around carry can be accom-  
plished without the need for logic or level inversion.  
Connection Diagram  
Dual-In-Line Package  
TL/F/6421–1  
Order Number 54LS283DMQB, 54LS283FMQB, 54LS283LMQB,  
DM54LS283J, DM54LS283W, DM74LS283M or DM74LS283N  
See NS Package Number E20A, J16A, M16A, N16E or W16A  
C
1995 National Semiconductor Corporation  
TL/F/6421  
RRD-B30M105/Printed in U. S. A.  

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