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DG403

更新时间: 2023-12-20 18:45:37
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描述
Monolithic CMOS Analog Switches

DG403 数据手册

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DATASHEET  
DG401, DG403  
Monolithic CMOS Analog Switches  
FN3284  
Rev 11.00  
Nov 20, 2006  
The DG401 and DG403 monolithic CMOS analog switches  
have TTL and CMOS compatible digital inputs.  
Features  
• ON Resistance (Max). . . . . . . . . . . . . . . . . . . . . . . . . 45  
These switches feature low analog ON resistance (<45)  
• Low Power Consumption (P ). . . . . . . . . . . . . . . . . . .<35W  
D
and fast switch time (t <150ns). Low charge injection  
ON  
• Fast Switching Action  
simplifies sample and hold applications.  
- t  
- t  
(Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150ns  
ON  
The improvements in the DG401, DG403 series are made  
possible by using a high voltage silicon-gate process. An  
epitaxial layer prevents the latch-up associated with older  
CMOS technologies. The 44V maximum voltage range  
(Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100ns  
OFF  
• Low Charge Injection  
• DG401 Dual SPST; Same Pinout as HI-5041  
• DG403 Dual SPDT; DG190, IH5043, IH5151, HI-5051  
• TTL, CMOS Compatible  
permits controlling 30V  
signals. Power supplies may be  
P-P  
single-ended from +5V to +34V, or split from 5V to 17V.  
The analog switches are bilateral, equally matched for AC or  
bidirectional signals. The ON resistance variation with analog  
signals is quite low over a 15V analog input range. The three  
different devices provide the equivalent of two SPST (DG401)  
or two SPDT (DG403) relay switch contacts with CMOS or  
TTL level activation. The pinout is similar, permitting a  
standard layout to be used, choosing the switch function as  
needed.  
• Single or Split Supply Operation  
• Pb-Free Plus Anneal Available (RoHS Compliant)  
Applications  
• Audio Switching  
• Battery Operated Systems  
• Data Acquisition  
• Hi-Rel Systems  
Pinouts  
DG401  
(16 LD SOIC, TSSOP)  
TOP VIEW  
• Sample and Hold Circuits  
• Communication Systems  
• Automatic Test Equipment  
D
1
2
3
4
5
6
7
8
16 S  
1
1
NC  
NC  
NC  
NC  
NC  
NC  
15  
14  
13  
12  
IN  
1
Ordering Information  
V-  
PART  
PART  
TEMP.  
PKG.  
DWG. #  
GND  
NUMBER*  
MARKING RANGE (°C) PACKAGE  
V
L
DG401DY*  
DG401DY  
-40 to +85 16 Ld SOIC  
M16.15  
M16.15  
11 V+  
DG401DYZ* DG401DYZ  
(Note)  
-40 to +85 16 Ld SOIC  
(Pb-free)  
IN  
S
10  
9
2
D
2
2
DG401DVZ* DG401 DVZ -40 to +85 16 Ld TSSOP M16.173  
(Note)  
(Pb-free)  
DG403DY*  
DG403DY  
-40 to +85 16 Ld SOIC  
M16.15  
M16.15  
DG403  
(16 LD SOIC, TSSOP)  
DG403DYZ* DG403DYZ  
(Note)  
-40 to +85 16 Ld SOIC  
(Pb-free)  
TOP VIEW  
DG403DVZ* DG403 DVZ -40 to +85 16 Ld TSSOP M16.173  
D
1
2
3
4
5
6
7
8
16 S  
1
1
(Note)  
(Pb-free)  
NC  
15 IN  
1
*Add “-T” suffix for tape and reel.  
D
S
S
D
14 V-  
13 GND  
12 V  
3
3
4
4
NOTE: Intersil Pb-free plus anneal products employ special Pb-free  
material sets; molding compounds/die attach materials and 100%  
matte tin plate termination finish, which are RoHS compliant and  
compatible with both SnPb and Pb-free soldering operations. Intersil  
Pb-free products are MSL classified at Pb-free peak reflow  
temperatures that meet or exceed the Pb-free requirements of  
IPC/JEDEC J STD-020.  
L
11 V+  
10 IN  
NC  
2
9
S
2
D
2
NOTE: (NC) No Connection.  
FN3284 Rev 11.00  
Nov 20, 2006  
Page 1 of 12  

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