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DG403AK

更新时间: 2024-09-10 04:14:35
品牌 Logo 应用领域
TEMIC 开关
页数 文件大小 规格书
10页 170K
描述
Low-Power, High-Speed CMOS Analog Switches

DG403AK 技术参数

生命周期:Transferred包装说明:,
Reach Compliance Code:unknown风险等级:5.83
模拟集成电路 - 其他类型:SPDTJESD-30 代码:R-GDIP-T16
标称负供电电压 (Vsup):-15 V信道数量:1
功能数量:2端子数量:16
标称断态隔离度:72 dB通态电阻匹配规范:3 Ω
最大通态电阻 (Ron):35 Ω最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装形状:RECTANGULAR封装形式:IN-LINE
认证状态:Not Qualified最大供电电流 (Isup):0.005 mA
标称供电电压 (Vsup):15 V表面贴装:NO
最长断开时间:100 ns最长接通时间:150 ns
技术:CMOS温度等级:MILITARY
端子形式:THROUGH-HOLE端子位置:DUAL

DG403AK 数据手册

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DG401/403/405  
Low-Power, High-Speed CMOS Analog Switches  
Features  
Benefits  
Applications  
D 44-V Supply Max Rating  
D Wide Dynamic Range  
D Audio and Video Switching  
D "15-V Analog Signal Range  
D On-Resistance—rDS(on): 20 W  
D Low Leakage—ID(on): 40 pA  
D Fast Switching—tON: 100 ns  
D Low Signal Errors and Distortion  
D Sample-and-Hold Circuits  
D Break-Before-Make Switching Action D Battery Operation  
D Simple Interfacing  
D Test Equipment  
D Hi-Rel Systems  
D PBX, PABX  
D Ultra Low Power  
Requirements—PD: 0.35 mW  
D TTL, CMOS Compatible  
D Single Supply Capability  
Description  
The DG401/403/405 monolithic analog switches were for the SPDT configurations. An epitaxial layer prevents  
designed to provide precision, high performance switching of latchup.  
analog signals. Combining low power (0.35 mW, typ) with  
high speed (t : 100 ns, typ), the DG401 series is ideally  
suited for portable and battery powered industrial and military  
applications.  
Each switch conducts equally well in both directions when on,  
and blocks up to 30 V peak-to-peak when off. On-resistance  
is very flat over the full "15-V analog range, rivaling JFET  
performance without the inherent dynamic range limitations.  
ON  
Built on the Siliconix proprietary high-voltage silicon-gate  
process to achieve high voltage rating and superior The three devices in this series are differentiated by the type  
switch on/off performance, break-before-make is guaranteed of switch action as shown in the functional block diagrams.  
Functional Block Diagrams and Pin Configurations  
DG401  
Dual-In-Line and SOIC  
DG401  
LCC  
NC  
NC  
D
S
IN  
1 1  
1
D
S
1
1
Key  
1
2
3
4
5
6
7
8
16  
3
2
1
20 19  
Two SPST Switches per Package  
NC  
NC  
NC  
NC  
NC  
NC  
IN  
1
15  
14  
13  
12  
11  
10  
9
4
5
6
7
8
18  
17  
16  
Truth Table  
NC  
V–  
V–  
Logic  
Switch  
OFF  
NC  
NC  
NC  
NC  
GND  
NC  
GND  
0
1
V
L
ON  
15  
14  
V
V+  
IN  
L
Logic “0” v 0.8 V  
Logic “1” w 2.4 V  
V+  
2
D
S
2
2
9
10 11 12 13  
NC IN  
2
NC  
D
S
2
2
Top View  
Top View  
Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70049.  
Siliconix  
1
S-53748—Rev. E, 05-Jun-97  

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