Datasheet > DEI1198

DEI1198

更新时间： 2022-06-24 15:42:40

品牌	Logo	应用领域
DEIAZ		输出元件
页数	文件大小	规格书
12页	234K
描述
8CH GND/OPEN PARALLEL OUTPUT DISCRETE INTERFACE IC

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DEI1198 数据手册

LIGHTNING PROTECTION

DINn inputs are designed to survive lightning induced transients as defined by RTCA DO160, Section 22, Cat A3 and

B3, pin injection Waveforms 3, 4, and 5A. They can withstand Level 3 stress (and WF5A up to 500 V) with the external

3 kΩ series resistor for current limiting.

Protection for higher stress levels can be achieved (for example: the 3200 V of WF3 Level 5) with the addition of

transient voltage suppressor (TVS) devices at the DINn pins. First select the TVS clamp voltage < 450 V (the intrinsic

1198 device capability). A convenient value would be 48 V, which reduces the TVS capacitance to the lowest

practicable level. The 3 kΩ series resistor limits the TVS surge current, thus allowing small low power TVS devices.

V/I

25% to 75%

Peak

of Largest Peak

T1 = 6.4 us

T2 = 70 us

50%

F = 1 MHZ

Figure 4 Voltage/Current Waveform 3

Figure 5: Voltage/Current Waveform 4

V/I

Peak

T1=40 us

T2=120 us

Waveform Source Impedance characteristics:

Waveform 3 Voc/Isc = 600 V / 24 A => 25 Ω

Waveform 4 Voc/Isc = 300 V / 60 A => 5 Ω

Waveform 5A Voc / Isc = 300 V / 300 A => 1 Ω

Waveform 5A Voc / Isc = 500 V / 500 A => 1 Ω

50%

Figure 6 Voltage/Current Waveform 5A

4 of 12

DS-MW-01198-01 Rev. E

5/10/2019

1 2 345 6 7...12

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DEI1282-SES	DEIAZ	8CH BIT PROGRAMMABLE GND/OPN & 28V/OPN DISCRETE INTERFACE IC	获取价格
DEI1282-SES-G	DIOTEC	Interface Circuit, PDSO16, ROHS COMPLIANT, PLASTIC, MS-012AC, SOIC-16	获取价格