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DAC128S085CISQX/NOPB PDF预览

DAC128S085CISQX/NOPB

更新时间： 2024-02-19 12:23:17
品牌 Logo 应用领域
德州仪器 - TI 转换器数模转换器
页数 文件大小 规格书
36页 926K
描述
具有轨到轨输出的 12 位微功耗八路数模转换器 | RGH | 16 | -40 to 125

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DAC128S085CISQX/NOPB 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：QFN
包装说明：WQFN-16针数：16
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：6 weeks
风险等级：1.14Is Samacsys：N
最大模拟输出电压：5.5 V最小模拟输出电压：
转换器类型：D/A CONVERTER输入位码：BINARY
输入格式：SERIALJESD-30 代码：S-PQCC-N16
JESD-609代码：e3长度：4 mm
最大线性误差 (EL)：0.1953%湿度敏感等级：1
位数：12功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：HVQCCN封装等效代码：LCC16,.16SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：260电源：3/5 V
认证状态：Not Qualified采样速率：2.5 MHz
座面最大高度：0.8 mm最大稳定时间：8.5 µs
标称安定时间 (tstl)：8.5 µs子类别：Other Converters
标称供电电压：3 V表面贴装：YES
技术：CMOS温度等级：AUTOMOTIVE
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：4 mm
Base Number Matches：1

DAC128S085CISQX/NOPB 数据手册

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Sample &  
Buy  
Support &  
Community  
Product  
Folder  
Tools &  
Software  
Technical  
Documents  
DAC128S085  
SNAS407H –AUGUST 2007–REVISED APRIL 2015  
DAC128S085 12-Bit Micro-Power OCTAL Digital-to-Analog Converter With Rail-to-Rail  
Outputs  
1 Features  
3 Description  
The DAC128S085 is a full-featured, general-purpose  
1
•
•
•
•
•
•
•
•
•
Ensured Monotonicity  
OCTAL  
12-bit  
voltage-output  
digital-to-analog  
Low Power Operation  
converter (DAC) that can operate from a single 2.7-V  
to 5.5-V supply and consumes 1.95 mW at 3 V and  
4.85 mW at 5 V. The DAC128S085 is packaged in a  
16-lead WQFN package and a 16-lead TSSOP  
package. The WQFN package makes the  
DAC128S085 the smallest OCTAL DAC in its class.  
The on-chip output amplifiers allow rail-to-rail output  
swing, and the 3-wire serial interface operates at  
clock rates up to 40 MHz over the entire supply  
voltage range. Competitive devices are limited to 25-  
MHz clock rates at supply voltages in the 2.7-V to  
3.6-V range. The serial interface is compatible with  
standard SPI™, QSPI, MICROWIRE, and DSP  
interfaces. The DAC128S085 also offers daisy-chain  
operation, where an unlimited number of  
DAC128S085s can be updated simultaneously using  
a single serial interface.  
Rail-to-Rail Voltage Output  
Daisy-Chain Capability  
Power-on Reset to 0 V  
Simultaneous Output Updating  
Individual Channel Power-Down Capability  
Wide Power Supply Range (2.7 V to 5.5 V)  
Dual Reference Voltages With Range of 0.5 V to  
VA  
•
•
•
•
•
•
•
•
•
Operating Temperature Range of −40°C to 125°C  
Smallest Package in the Industry  
Resolution 12 Bits  
INL ±8 LSB (Maximum)  
DNL 0.75 / −0.4 LSB (Maximum)  
Settling Time 8.5 μs (Maximum)  
Zero Code Error 15 mV (Maximum)  
Full-Scale Error −0.75 %FSR (Maximum)  
Supply Power  
There are two references for the DAC128S085. One  
reference input serves channels A through D, while  
the other reference serves channels E through H.  
Each reference can be set independently between  
0.5 V and VA, providing the widest possible output  
dynamic range. The DAC128S085 has a 16-bit input  
shift register that controls the mode of operation, the  
power-down condition, and the register/output value  
of the DAC channels. All eight DAC outputs can be  
updated simultaneously or individually.  
–
–
1.95 mW (3 V) / 4.85 mW (5 V) Typical  
Power Down 0.3 μW (3 V) / 1 μW (5 V) Typical  
2 Applications  
•
•
•
•
•
•
•
Battery-Powered Instruments  
Digital Gain and Offset Adjustment  
Programmable Voltage and Current Sources  
Programmable Attenuators  
Voltage Reference for ADCs  
Sensor Supply Voltage  
Device Information(1)  
PART NUMBER  
PACKAGE  
TSSOP (16)  
WQFN (16)  
BODY SIZE (NOM)  
5.00 mm × 4.4 mm  
4.00 mm × 4.00 mm  
DAC128S085  
(1) For all available packages, see the orderable addendum at  
the end of the datasheet.  
Range Detectors  
Simplified Schematic  
2 Individual  
References  
independent of  
VDD  
Wide supply range  
VDD  
VREF2 VREF1  
OUTA  
OUTB  
OUTC  
OUTD  
OUTE  
OUTF  
OUTG  
OUTH  
4-wire SPI  
MCU  
(Master)  
Digital I/O  
tolerant of  
Master to DAC  
rail potential  
mismatch  
GND  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 
 
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