the DAC1230, DAC1231, and DAC1232 must be connected
to ground. It is important that I and I are at ground
potential for current switching applications. Any difference
Definition of Package Pinouts
CONTROL SIGNALS (all control signals are level actuated)
OUT OUT
1
2
CS: Chip Select (active low). The CS will enable WR1.
of potential (V
change of
on these pins) will result in a linearity
OS
WR1: Write 1. The active low WR1 is used to load the digital
data bits (DI) into the input latch. The data in the input latch
is latched when WR1 is high. The 12-bit input latch is split
into two latches. One holds the first 8 bits, while the other
holds 4 bits. The Byte 1/Byte 2 control pin is used to select
both latches when Byte 1/Byte 2 is high or to overwrite the
4-bit input latch when in the low state.
V
OS
3 V
REF
10V and these ground pins are 9
and I , the linearity change will be
e
For example, if V
REF
mV offset from I
0.03%.
OUT
OUT
2
1
Definition of Terms
Resolution: Resolution is defined as the reciprocal of the
number of discrete steps in the DAC output. It is directly
related to the number of switches or bits within the DAC. For
Byte 1/Byte 2: Byte Sequence Control. When this control is
high, all 12 locations of the input latch are enabled. When
low, only the four least significant locations of the input latch
are enabled.
12
example, the DAC1208 has 2 or 4096 steps and therefore
has 12-bit resolution.
WR2: Write 2 (active low). The WR2 will enable XFER.
XFER: Transfer Control Signal (active low). This signal, in
combination with WR2, causes the 12-bit data which is
available in the input latches to transfer to the DAC register.
Linearity Error: Linearity error is the maximum deviation
from a straight line passing through the endpoints of the
DAC transfer characteristic. It is measured after adjusting
for zero and full-scale. Linearity error is a parameter intrinsic
to the device and cannot be externally adjusted.
DI to DI : Digital Inputs. DI is the least significant digital
11
0
0
input (LSB) and DI is the most significant digital input
11
(MSB).
National’s linearity test (a) and the best straight line test (b)
used by other suppliers are illustrated below. The best
straight line (b) requires a special zero and FS adjustment
for each part, which is almost impossible for the user to
determine. The end point test uses a standard zero FS ad-
justment procedure and is a much more stringent test for
DAC linearity.
I
: DAC Current Output 1. I is a maximum for a
OUT1 OUT1
digital code of all 1s in the DAC register, and is zero for all
0s in the DAC register.
I
: DAC Current Output 2. I
is a constant minus
e
constant (for a fixed reference
OUT2
OUT2
a
I
OUT2
I
, or I
OUT1
OUT1
voltage). This constant current is
1
Power Supply Sensitivity: Power supply sensitivity is a
measure of the effect of power supply changes on the DAC
full-scale output.
c
b
1
V
REF
4096
#
J
divided by the reference input resistance.
R
: Feedback Resistor. The feedback resistor is provided
Settling Time: Full-scale current settling time requires zero
to full-scale or full-scale to zero output change. Settling time
is the time required from a code transition until the DAC
Fb
on the IC chip for use as the shunt feedback resistor for the
external op amp which is used to provide an output voltage
for the DAC. This on-chip resistor should always be used
(not an external resistor) since it matches the resistors in
the on-chip R-2R ladder and tracks these resistors over
temperature.
g
output reaches within (/2 LSB of the final output value.
Full-Scale Error: Full-scale error is a measure of the output
error between an ideal DAC and the actual device output.
Ideally, for the DAC1208 or DAC1230 series, full-scale is
b
e
V : Reference Voltage Input. This input connects an ex-
REF
ternal precision voltage source to the internal R-2R ladder.
V
V
1
LSB. For
e
V
10V and unipolar operation,
REF
REF
b e
10.0000V 2.44 mV 9.9976V. Full-scale
FULL-SCALE
b
V
REF
can be selected over the range of 10V to 10V. This
error is adjustable to zero.
is also the analog voltage input for a 4-quadrant multiplying
DAC application.
Differential Non-Linearity: The difference between any
two consecutive codes in the transfer curve from the theo-
retical 1 LSB is differential non-linearity.
V
: Digital Supply Voltage. This is the power supply pin for
to 15 V . Operation is
DC
CC
the part. V
can be from 5 V
DC
CC
optimum for 15 V
Monotonic: If the output of a DAC increases for increasing
digital input code, then the DAC is monotonic. A 12-bit DAC
which is monotonic to 12 bits simply means that input in-
creasing digital input codes will produce an increasing ana-
log output.
.
DC
3 and 12 of the DAC1208, DAC1209, and
DAC1210 must be connected to ground. Pins 3 and 10 of
GND: Pins
TL/H/5690–5
b) Shifting FS Adjust to Pass
Best Straight Line Test
a) End Point Test After Zero
and FS Adjust
5
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