Datasheet > DAC1210

DAC1210

更新时间： 2024-02-02 09:58:53

品牌	Logo	应用领域
美国国家半导体 - NSC		转换器模数转换器
页数	文件大小	规格书
18页	362K
描述
12-Bit, uP Compatible, Double-Buffered D to A Converters

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中文翻译

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技术参数
数据手册

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DAC1210 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	DIP, DIP24,.6	Reach Compliance Code：	unknown
风险等级：	5.92	转换器类型：	D/A CONVERTER
输入位码：	OFFSET BINARY, COMPLEMENTARY OFFSET BINARY	JESD-30 代码：	R-XDIP-T24
JESD-609代码：	e0	最大线性误差 (EL)：	0.05%
位数：	12	功能数量：	1
端子数量：	24	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	CERAMIC
封装代码：	DIP	封装等效代码：	DIP24,.6
封装形状：	RECTANGULAR	封装形式：	IN-LINE
电源：	12/15 V	子类别：	Other Converters
表面贴装：	NO	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	Base Number Matches：	1

DAC1210 数据手册

Application Hints (Continued)

cations where the DAC is used in a continuous feedback

control loop and is driven by a binary up/down counter, or in

function generation circuits where a ROM is continuously

providing DAC data.

incrementing the address for Byte 2) from propagating

through the address word and changing any of the bits de-

coded for CS or XFER. Figure 5 shows how to prevent this

effect.

Only the DAC1208, DAC1209, DAC1210 devices can have

all 12 inputs flow-through. Simply grounding CS, WR1, WR2

and XFER and tying Byte 1/Byte 2 high allows both internal

registers to follow the applied digital inputs (flow-through)

and directly affect the DAC analog output.

The same problem can occur from a borrow when an auto-

decremented address is used; but only if the processor’s

address outputs are inverted before being decoded.

1.8 Control Signal Timing

When interfacing these MICRO-DACs to any microproces-

sor, there are two important time relationships that must be

considered to insure proper operation. The first is the mini-

mum WR strobe pulse width which is specified as 320 ns for

1.7 Address Decoding Tips

It is possible to map the MICRO-DACs into system ROM

space to allow more efficient use of existing address decod-

ing hardware. The DAC in effect can share the same ad-

dresses of any number of ROM locations. The ROM outputs

will only be enabled by a READ of its address (gated by the

system READ strobe) and the DAC will only accept data

that is written to the same address (gated by the system

WRITE strobe).

11.4V to 15.75V and operation over temperature, but

typically a pulse width of only 250 ns is adequate. A second

consideration is that the guaranteed minimum data hold

time of 90 ns should be met or erroneous data can be

latched. This hold time is defined as the length of time data

must be held valid on the digital inputs after a qualified (via

CS) WR strobe makes a low to high transition to latch the

applied data.

The Byte 1/Byte 2 control function can easily be generated

by the processor’s least significant address bit (A0) by plac-

ing the DAC at two consecutive address locations and utiliz-

ing double-byte WRITE instructions which automatically in-

crement or decrement the address. The CS and XFER sig-

nals can then be decoded from the remaining address bits.

Care must be taken in selecting the actual address used

for Byte 1 of the DAC to prevent a carry (as a result of

If the controlling device or system does not inherently meet

these timing specs the DAC can be treated as a slow mem-

ory or peripheral and utilize a technique to extend the write

strobe. A simple extension of the write time, by adding a

wait state, can simultaneously hold the write strobe active

and data valid on the bus to satisfy the minimum WR pulse

Write

Address Bits

Cycle

0**

First

(Byte 1)

Decoded to

Address DAC

Second

(Byte 2)

*Starting with a 0 prevents a carry on address incrementing.

**Used as Byte 1/Byte2 Control.

FIGURE 5

TL/H/5690-12

FIGURE 6. Accommodating a High Speed System

1...6 7 8910 11 12...18

中文翻译

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与DAC1210相关器件

型号	品牌	获取价格	描述	数据表
DAC-12100	DATEL	获取价格	12-Bit, 100MHz, Low-Power D/A Converters
DAC-12100/883	DATEL	获取价格	12-Bit, 100MHz, Low-Power D/A Converters
DAC-12100/883-C	DATEL	获取价格	12-Bit, 100MHz, Low-Power D/A Converters
DAC-12100LC	DATEL	获取价格	12-Bit, 100MHz, Low-Power D/A Converters
DAC-12100LC-C	DATEL	获取价格	12-Bit, 100MHz, Low-Power D/A Converters
DAC-12100LE	DATEL	获取价格	12-Bit, 100MHz, Low-Power D/A Converters
DAC-12100LE-C	DATEL	获取价格	12-Bit, 100MHz, Low-Power D/A Converters
DAC-12100LM	DATEL	获取价格	12-Bit, 100MHz, Low-Power D/A Converters
DAC-12100LM-C	DATEL	获取价格	12-Bit, 100MHz, Low-Power D/A Converters
DAC1210LCD	TI	获取价格	IC,D/A CONVERTER,SINGLE,12-BIT,CMOS,DIP,24PIN

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