Datasheet > DA9220-70V76

DA9220-70V76

更新时间： 2022-05-14 22:22:31

品牌	Logo	应用领域
DIALOG		/
页数	文件大小	规格书
62页	1462K
描述
High-Performance Dual-Channel DC-DC Converter

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数据手册

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DA9220-70V76 数据手册

DA9220

High-Performance Dual-Channel DC-DC Converter

Pinout

Figure 4: DA9220 Pinout Diagram (Top View)

Table 1: Pin Description

Type

Drive

Reset

State

Pin No. Pin Name

Description

(Table 2) (mA)

Supply voltage for Buck1 power stage, decouple

with 10 µF and connect to same source as

AVDD

A1, B1

A2, B2

PVDD1

LX1

PWR

AIO

5000

Switch node of Buck1, connect a 100 nH

inductor between LX1 and output capacitor

A3, B3

A4, B4

PGND1

PGND2

GND

5000

Buck1 power stage VSS rail

Buck2 power stage VSS rail

Switch node of Buck2, connect a 100 nH

inductor between LX2 and output capacitor

A5, B5

A6, B6

LX2

AIO

5000

Supply voltage for Buck2 power stage, decouple

with 10 µF and connect to same source as

AVDD

PVDD2

PWR

SCL/GPIO3

SDA/GPIO4

DIO

I²C clock or general purpose I/O

I²C data or general purpose I/O

Powers up SW control interface and auxiliary

circuitry (for example, bandgap, oscillator, and

references).

IC_EN

CONF/GPIO0 AI/DIO

Chip configuration or general purpose I/O

General purpose I/O

GPIO1

GPIO2

DIO

General purpose I/O

Buck1 negative node of differential voltage

feedback, connect to VSS at point of load

FB1N

FB1P

AVDD

Buck1 positive node of differential voltage

feedback, connect to VOUT1 at point of load

Supply rail for analog control circuitry, decouple

with 1 µF and connect to same source as PVDD

PWR

Datasheet

Revision 2.1

17-Sep-2020

CFR0011-120-00

6 of 62

1...3 4 567 8 9...62

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