Datasheet > CYS25G02K100V1-MGC

CYS25G02K100V1-MGC

更新时间： 2024-02-13 22:47:53

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		ATM 异步传输模式电信电信集成电路
页数	文件大小	规格书
59页	736K
描述
ATM Network Interface, 1-Func, PBGA456, 35 X 35 MM, 2.33 MM HEIGHT, BGA-456

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技术参数
数据手册

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CYS25G02K100V1-MGC 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	35 X 35 MM, 2.33 MM HEIGHT, BGA-456	针数：	456
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.92	应用程序：	SONET;SDH
JESD-30 代码：	S-PBGA-B456	JESD-609代码：	e0
长度：	35 mm	功能数量：	1
端子数量：	456	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	BGA	封装形状：	SQUARE
封装形式：	GRID ARRAY	峰值回流温度（摄氏度）：	225
认证状态：	Not Qualified	座面最大高度：	2.46 mm
标称供电电压：	3.3 V	表面贴装：	YES
电信集成电路类型：	ATM/SONET/SDH NETWORK INTERFACE	温度等级：	COMMERCIAL
端子面层：	TIN LEAD	端子形式：	BALL
端子节距：	1.27 mm	端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	30	宽度：	35 mm
Base Number Matches：	1

CYS25G02K100V1-MGC 数据手册

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Programmable Serial Interface

(High Speed Devices)

PRELIMINARY

Registered TE

Mux

TE Mux

From

Output PIM

Receive

Mux

RES

To Routing

Channel

Mux

Transmit

Mux

Signal

Mux

Clock

Polarity

Mux

RES

Clock Mux

Mux

Figure 4. Block Diagram of a Standard Datapath Cell.

Logic Block Cluster (LBC)

tions. If a cluster memory block is not specifically utilized by

the designer, Cypress’s Warp software can automatically use

it to implement large blocks of logic.

The PSI architecture consists of several logic block clusters,

each of which have 8 Logic Blocks (LB) and 2 cluster memory

blocks connected via a Programmable Interconnect Matrix

(PIM) as shown in Figure 6. Each cluster memory block con-

sists of 8-Kbit single-port RAM, which is configurable as syn-

chronous or asynchronous. The cluster memory blocks can be

cascaded with other cluster memory blocks within the same

LBC as well as other LBCs to implement larger memory func-

All LBCs interface with each other via horizontal and vertical

routing channels.

I/O Block

Cluster

PIM

Channel memory

outputs drive

dedicated tracks in the

horizontal and vertical

routing channels

Channel

Memory

Block

Cluster

Memory

Block

Cluster

Memory

Block

H-to-V

PIM

V-to-H

PIM

Pin inputs from the I/O cells

drive dedicated tracks in the

horizontal and vertical routing

channels

Figure 5. PSI Routing Interface.

Document #: 38-02021 Rev *A

Page 6 of 59

1...3 4 567 8 9...59

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