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CYM1730PZ-25C PDF预览

CYM1730PZ-25C

更新时间: 2024-02-18 23:17:37
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器内存集成电路
页数 文件大小 规格书
6页 105K
描述
SRAM Module, 64KX24, 25ns, CMOS, MODULE, ZIP-56

CYM1730PZ-25C 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:ZIP包装说明:MODULE, ZIP-56
针数:56Reach Compliance Code:not_compliant
ECCN代码:3A991.B.2.AHTS代码:8542.32.00.41
风险等级:5.59最长访问时间:25 ns
I/O 类型:COMMONJESD-30 代码:R-XZMA-T56
JESD-609代码:e0内存密度:1572864 bit
内存集成电路类型:SRAM MODULE内存宽度:24
功能数量:1端口数量:1
端子数量:56字数:65536 words
字数代码:64000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:64KX24输出特性:3-STATE
可输出:YES封装主体材料:UNSPECIFIED
封装代码:ZIP封装等效代码:ZIP56,.1,.1
封装形状:RECTANGULAR封装形式:MICROELECTRONIC ASSEMBLY
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
最大待机电流:0.18 A最小待机电流:4.5 V
子类别:SRAMs最大压摆率:0.51 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:1.27 mm端子位置:ZIG-ZAG
处于峰值回流温度下的最长时间:NOT SPECIFIEDBase Number Matches:1

CYM1730PZ-25C 数据手册

 浏览型号CYM1730PZ-25C的Datasheet PDF文件第2页浏览型号CYM1730PZ-25C的Datasheet PDF文件第3页浏览型号CYM1730PZ-25C的Datasheet PDF文件第4页浏览型号CYM1730PZ-25C的Datasheet PDF文件第5页浏览型号CYM1730PZ-25C的Datasheet PDF文件第6页 
1CYM1730  
CYM1730  
64K x 24 Static RAM Module  
using six 32K x 8 static RAMs in SOJ packages mounted onto  
an epoxy laminate board with pins.  
Features  
• High-density 1.5M SRAM module  
• High-speed CMOS SRAMs  
— Access time of 25 ns  
Writing to the device is accomplished when the chip select  
(CS) and write enable (WE) inputs are both LOW. Data on the  
input/output pins (I/O through I/O ) of the device is written  
0
23  
into the memory location specified on the address pins (A  
0
• 56-pin, 0.5-inch-high ZIP package  
• Low active power  
through A ).  
15  
Reading the device is accomplished by taking the chip select  
(CS) and output enable (OE) LOW while write enable (WE)  
remains HIGH. Under these conditions, the contents of the  
memory location specified on the address pins will appear on  
the input/output pins.  
— 2.8W (max. for t = 25 ns)  
AA  
• SMD technology  
• TTL-compatible inputs and outputs  
• Commercial temperature range  
• Small PCB footprint  
The input/output pins remain in a high-impedance state unless  
the module is selected, outputs are enabled, and write enable  
is HIGH.  
— 1.05 sq. in.  
Functional Description  
The CYM1730 is a high-performance 1.5M static RAM module  
organized as 64K words by 24 bits. This module is constructed  
Logic Block Diagram  
Pin Configuration  
A – A  
0
14  
15  
ZIP  
Top View  
OE  
WE  
V
CC  
1
3
V
CC  
2
I/O  
I/O  
I/O  
I/O  
0
2
4
6
I/O  
I/O  
I/O  
I/O  
1
3
5
7
4
5
32K x 8  
SRAM  
32K x 8  
SRAM  
6
7
8
9
10  
12  
14  
16  
18  
20  
22  
24  
26  
28  
30  
32  
34  
36  
38  
40  
42  
44  
46  
48  
50  
52  
54  
56  
11  
13  
15  
17  
19  
21  
23  
25  
27  
29  
31  
GND  
GND  
A
0
A
1
3
5
A
2
A
A
4
6
A
15  
A
I/O – I/O  
16  
23  
A
1 OF 2  
DECODER  
8
A
7
CS  
NC  
I/O  
I/O  
I/O  
I/O  
GND  
WE  
NC  
GND  
I/O  
I/O  
I/O  
I/O  
NC  
OE  
A
A
A
A
CS  
8
32K x 8  
SRAM  
32K x 8  
SRAM  
9
10  
12  
14  
11  
13  
15  
33  
35  
37  
39  
41  
43  
45  
47  
49  
51  
53  
55  
A
8
9
I/O – I/O  
8
15  
A
10  
8
11  
13  
15  
A
12  
A
14  
GND  
I/O  
I/O  
18  
I/O  
I/O  
22  
V
CC  
32K x 8  
SRAM  
32K x 8  
SRAM  
GND  
16  
I/O  
I/O  
I/O  
17  
19  
21  
23  
20  
I/O  
V
CC  
I/O – I/O  
0
7
1730-2  
8
1730-1  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
July 1991 – Revised January 1995  
408-943-2600  

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