CY8CLED04D01, CY8CLED04D02
CY8CLED04G01, CY8CLED03D01
CY8CLED03D02, CY8CLED03G01
CY8CLED02D01, CY8CLED01D01
The DMM modulator consists of a 12-bit PWM block and a 4-bit
DSM (Delta Sigma Modulator) block. The width of the PWM, the
width of the DMM, and the clock defines the output frequency.
The duty cycle of the PWM output is dithered by using the DSM
block which has a user selectable resolution up to 4 bits.
4.2 Low Side N-Channel FETs
The internal low side N-Channel FETs are designed to enhance
system integration. The low side N-Channel FETs include the
following key features:
■ Drive capability up to 1A
4.4.3 PWM Mode Configuration
■ Switching times of 20 ns (rise and fall times) to ensure high
efficiency (more than 90%)
■ High resolution operation up to 16 bits
■ User programmable period from 1 to 65535 clocks
■ Drain source voltage rating 32V
■ Low RDS(ON) to ensure high efficiency
■ Switching frequency up to 2 MHz
■ Dedicated PWM module enables customers to use core PSoC
digital blocks for other use
■ Interrupt on rising edge of the output or terminal count
■ Precise PWM phase control to manage system current edges
■ Phase synchronization among the four channels
4.3 External Gate Drivers
These gate drivers enable the use of external FETs with higher
current capabilities or lower RDS(ON). The external gate drivers
directly drive MOSFETS that are used in switching applications.
The gate driver provides multiple programmable drive strength
steps to enable improved EMI management. The external gate
drivers include the following key features.
■ PWM output can be aligned to left, right, or center
The PWM features a down counter and a pulse width register. A
comparator output is asserted when the count value is less than
or equal to the value in the pulse width register.
■ Programmable drive strength options (25%, 50%, 75%, 100%)
for EMI management
4.5 Current Sense Amplifier
Four high side current sense amplifiers provide a differential
sense capability to sense the voltage across current sense
resistors in lighting systems. The current sense amplifier
includes the following key features:
■ Rise and fall times at 55 ns with 4 nF load
4.4 Dimming Modulation Schemes
There are three dimming modulation schemes available with the
PowerPSoC. The configurable modulation schemes are:
■ Operation with high common mode voltage to 32V
■ High common mode rejection ratio
■ Precise Intensity Signal Modulation (PrISM)
■ Delta Sigma Modulation Mode (DMM)
■ Pulse Width Modulation (PWM)
■ Programmable bandwidth to optimize system noise immunity
An off-chip resistor Rsense is used for high side current
measurement as shown in Figure 4-3 on page 10. The output of
the current sense amplifier goes to the Power Peripherals
Analog Multiplexer where the user selects which hysteretic
controller to route to. Table 4-1 illustrates example values of
4.4.1 PrISM Mode Configuration
■ High resolution operation up to 16 bits
Rsense for different currents.
■ Dedicated PrISMmodule enablescustomersto use core PSoC
digital blocks for other needs
Table 4-1. Rsense Values for Different Currents
■ Clocking up to 48 MHz
■ Selectable output signal density
■ Reduced EMI
Max Load Current (mA)
Typical Rsense (mΩ)
1000
750
500
350
100
130
200
300
The PrISM mode compares the output of a pseudo-random
counter with a signal density value. The comparator output
asserts when the count value is less than or equal to the value
in the signal density register.
4.4.2 DMM Mode Configuration
■ High resolution operation up to 16 bits
■ Configurable output frequency and delta sigma modulator
width to trade off repeat rates versus resolution
■ Dedicated DMM module enables customers to use PSoC
digital blocks for other uses
■ Clocking up to 48 MHz
Document Number: 001-46319 Rev. *G
Page 9 of 52
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