CY8C21345
CY8C22345
CY8C22545
Analog System
Additional System Resources
The Analog System consists of a 10-bit SAR ADC and six
configurable blocks.
System Resources, some of which are listed in the previous
sections, provide additional capability useful to complete
systems. Additional resources include a MAC, low voltage
detection, and power on reset. The merits of each system
resource are:
The programmable 10-bit SAR ADC is an optimized ADC that
can be run up to 200 ksps with ± 1.5 LSB DNL and ± 2.5 LSB INL
(true for VDD 3.0 V and Vref 3.0 V). External filters are
required on ADC input channels for antialiasing. This ensures
that any out-of-band content is not folded into the input signal
band.
■ Digital clock dividers provide three customizable clock
frequencies for use in applications. The clocks may be routed
to both the digital and analog systems. Additional clocks can
be generated using digital PSoC blocks as clock dividers.
Reconfigurable analog resources allow creating complex analog
signal flows. Analog peripherals are very flexible and may be
customized to support specific application requirements. Some
of the more common PSoC analog functions (most available as
user modules) are:
■ Additional Digital resources and clocks optimized for CSD.
■ Support “RTC” block into digital peripheral logic.
■ A multiply accumulate (MAC) provides a fast 8-bit multiplier
with 32-bit accumulate, to assist in both general math and
digital filters.
■ Analog-to-Digital converters (Single or Dual, with 8-bit
resolution)
■ Pin-to-pin Comparator
■ TheI2Cmoduleprovides100and400kHzcommunicationover
two wires. Slave, master, and multi-master modes are all
supported.
■ Single ended comparators with absolute (1.3 V) reference or
5-bit DAC reference
■ Low Voltage Detection (LVD) interrupts can signal the
application of falling voltage levels, while the advanced POR
(Power On Reset) circuit eliminates the need for a system
supervisor.
■ 1.3 V reference (as a System Resource)
Analog blocks are provided in columns of four, which include
CT-E (Continuous Time) and SC-E (Switched Capacitor) blocks.
These devices provide limited functionality Type “E” analog
blocks.
■ An internal 1.3 V reference provides an absolute reference for
the analog system, including ADCs and DACs.
Figure 2. Analog System Block Diagram
Array Input Configuration
ACI0[1:0]
ACI1[1:0]
ACI1[1:0]
ACI1[1:0]
ACE00
ASE10
ACE01
ASE11
ACE10
ACE11
Block Array
AmuxL
AmuxR
P0[0:7]
ACI2[3:0]
10 bit SAR ADC
Analog Reference
Interface to
Reference
Digital System
Generators
AGND
Bandgap
M8C Interface (Address Bus, Data Bus, Etc.)
Document Number: 001-43084 Rev. *W
Page 4 of 40
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