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CS4461-CZZ PDF预览

CS4461-CZZ

更新时间: 2024-02-09 13:09:54
品牌 Logo 应用领域
凌云 - CIRRUS /
页数 文件大小 规格书
11页 255K
描述
Multi-Bit A/D for Class-D Real-Time PSR Feedback

CS4461-CZZ 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Not Recommended零件包装代码:TSSOP
包装说明:TSSOP, TSSOP24,.25针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.23
最大模拟输入电压:3.9 V最小模拟输入电压:1.1 V
转换器类型:ADC, DELTA-SIGMAJESD-30 代码:R-PDSO-G24
JESD-609代码:e3长度:7.8 mm
湿度敏感等级:3模拟输入通道数量:1
功能数量:1端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出位码:BINARY封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP24,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3.3,5 V
认证状态:Not Qualified采样并保持/跟踪并保持:SAMPLE
座面最大高度:1.1 mm子类别:Analog to Digital Converters
标称供电电压:5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:4.4 mmBase Number Matches:1

CS4461-CZZ 数据手册

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CS4461  
2. PIN DESCRIPTIONS  
PSR_RESET  
FILT+  
REFGND  
VQ  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
GND  
PSR_SYNC  
PSR_DATA  
PSR_MCLK  
VDP  
2
3
GND  
4
GND  
5
VA  
6
GND  
GND  
7
VDP  
AIN-  
8
TEST  
AIN+  
9
GND  
OVERFLOW  
VDP  
10  
11  
12  
Top-Down View  
24-pin TSSOP Package  
PSR_EN  
GND  
VDP  
Pin Name  
VDP  
#
Pin Descriprion  
6
8
13  
14  
Digital Logic Power (Input) – Digital core and input/output power supply. Nominally +3.3 V or +5.0 V.  
Supply decoupling should placed as close as possible to pin 6.  
VA  
19  
Analog Power (Input) - Analog power supply. Nominally +5.0 V.  
Ground (Input) - Ground reference for both analog and digital.  
2
7
10  
12  
18  
20  
21  
GND  
Reset (Input) - When PSR_RESET is low, the CS4461 enters a low power mode and all internal states  
are reset. On initial power up, PSR_RESET must be held low until the power supply is stable, and all  
input clocks are stable in frequency and phase.  
PSR_RESET  
1
VQ  
22  
23  
24  
Quiescent Voltage (Output) - Filter connection for the internal quiescent reference voltage.  
Reference Ground (Input) - Ground reference for the internal sampling circuits.  
REFGND  
FILT+  
Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuit.  
AIN+  
AIN-  
16  
17  
Differential PSR Analog Input (Input) - Signals are presented differentially to the delta-sigma modula-  
tor via the AIN+/- pins.  
PSR_MCLK  
PSR_SYNC  
PSR_DATA  
PSR_EN  
5
3
Master Clock (Input) - Clock source for the delta-sigma modulator and output data.  
Synchronization Data Output (Output) - Used to synchronize the serial data in the PWM modulator.  
PSR Serial Data Output (Output) - Power supply modulated and formatted serial data.  
PSR Enable (Input) - A high to low transition on this pin will enable the PSR feedback circuit.  
4
11  
OVERFLOW  
TEST  
15  
9
Overflow (Output, open drain) - Indicates a modulator overflow condition.  
Test (Output) - This pin may toggle during normal operation and should be pulled low through a 47 kΩ  
resistor to GND in order to minimize noise.  
6
DS650F1  

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