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CS3843BGDR8 PDF预览

CS3843BGDR8

更新时间： 2024-01-21 08:24:09
品牌 Logo 应用领域
樱桃 - CHERRY /
页数 文件大小 规格书
6页 157K
描述
Off-Line Current Mode PWM Control Circuit Off-Line Current Mode PWM Control Circuit

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CS3843BGDR8 技术参数

是否Rohs认证： 不符合生命周期：Transferred
包装说明：SO-8Reach Compliance Code：unknown
风险等级：5.77模拟集成电路 - 其他类型：SWITCHING CONTROLLER
控制模式：CURRENT-MODE控制技术：PULSE WIDTH MODULATION
最大输入电压：25 V最小输入电压：12 V
标称输入电压：15 VJESD-30 代码：R-PDSO-G8
JESD-609代码：e0功能数量：1
端子数量：8最高工作温度：70 °C
最低工作温度：最大输出电流：1 A
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP8,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE认证状态：Not Qualified
子类别：Switching Regulator or Controllers表面贴装：YES
切换器配置：BUCK最大切换频率：500 kHz
技术：BIPOLAR温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
Base Number Matches：1

CS3843BGDR8 数据手册

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CS3842B/CS3843B  
Off-Line Current Mode PWM  
Control Circuit  
with Very Low Start Up Current  
Description  
Features  
The CS384XB provides all the neces-  
possible. On board logic ensures that  
ꢀ Very low Start Up Current  
sary features to implement off-line  
fixed frequency current-mode control  
with a minimum number of external  
components. The family has been opti-  
mized for very low start up current  
(300µA, typ).  
V
is stabilized before the output  
(300µA typ)  
REF  
stage is enabled. Ion-implant resistors  
provide tighter control of undervoltage  
lockout.  
Optimized Off-line  
ꢀ
ꢀ
Control  
Internally Trimmed,  
Temperature  
Other features include pulse-by-pulse  
current limiting, and a high-current  
totem pole output for driving capaci-  
tive loads, such as the gate of a power  
MOSFET. The output is LOW in the off  
state, consistent with N-channel  
devices.  
These ICs are available in 8 and 14 lead  
surface mount (SO) and 8 lead PDIP  
packages.  
Compensated Oscillator  
The CS384XB family incorporates a  
precision temperature-controlled oscil-  
lator with an internally trimmed dis-  
charge current to minimize variations  
in frequency. A precision duty-cycle  
clamp eliminates the need for an exter-  
nal oscillator when a 50% duty-cycle is  
used. Duty-cycles of almost 100% are  
Maximum Duty-cycle  
ꢀ
Clamp  
ꢀ VREF stabilization before  
Output Enable  
ꢀ Pulse-by-pulse Current  
Limiting  
ꢀ Improved Undervoltage  
Absolute Maximum Ratings  
Lockout  
Supply Voltage (ICC<30mA)..........................................................Self Limiting  
Supply Voltage (Low Impedance Source)...................................................30V  
Output Current...............................................................................................±1A  
Output Energy (Capacitive Load) .................................................................5µJ  
Analog Inputs (VFB, Sense) ............................................................-0.3V to 5.5V  
Error Amp Output Sink Current...............................................................10mA  
Lead Temperature Soldering  
ꢀ Double Pulse Suppression  
ꢀ 1% Trimmed Bandgap  
Reference  
ꢀ High Current Totem Pole  
Output  
Package Options  
Wave Solder (through hole styles only) ...................10 sec. max, 260°C peak  
Reflow (SMD styles only) ....................60 sec. max above 183°C, 230°C peak  
8 Lead PDIP & SO Narrow  
Block Diagram  
1
2
3
4
8
7
6
5
COMP  
VFB  
VREF  
VCC  
VCC  
VCC Pwr  
Undervoltage  
Lock-out Circuit  
Sense  
OSC  
VOUT  
Gnd  
34V  
Set/  
5V  
VREF  
Reset Reference  
Gnd  
16V/10V  
(8.4V/7.6V)  
Internal  
Bias  
14L SO Narrow  
REF  
2.50V  
Output  
Enable  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
COMP  
NC  
VREF  
NC  
OSC  
NOR  
Oscillator  
VOUT  
VFB  
VCC  
S
R
2 R  
+
–
NC  
VCC Pwr  
VOUT  
PWM  
Latch  
VFB  
VC  
Error  
Pwr Gnd  
R
Sense  
NC  
Amplifier  
Current  
Sense  
Comparator  
1 V  
COMP  
Sense  
Pwr Gnd  
Gnd  
8
OSC  
( ) Indicates CS-3843B  
Cherry Semiconductor Corporation  
2000 South County Trail, East Greenwich, RI 02818  
Tel: (401)885-3600 Fax: (401)885-5786  
Email: info@cherry-semi.com  
Web Site: www.cherry-semi.com  
Rev. 6/23/99  
A
®
Company  
1
123456

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