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CS3842B/D PDF预览

CS3842B/D

更新时间: 2022-01-19 12:02:00
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描述
Off-Line Current Mode PWM Control Circuit with Very Low Start Up Current

CS3842B/D 数据手册

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CS3842B/CS3843B  
Off-Line Current Mode PWM  
Control Circuit  
with Very Low Start Up Current  
Description  
Features  
The CS384XB provides all the neces-  
possible. On board logic ensures that  
V is stabilized before the output  
REF  
stage is enabled. Ion-implant resistors  
provide tighter control of undervoltage  
lockout.  
Very low Start Up Current  
sary features to implement off-line  
fixed frequency current-mode control  
with a minimum number of external  
components. The family has been opti-  
mized for very low start up current  
(300µA, typ).  
(300µA typ)  
Optimized Off-line  
Control  
Internally Trimmed,  
Temperature  
Compensated Oscillator  
Other features include pulse-by-pulse  
current limiting, and a high-current  
totem pole output for driving capaci-  
tive loads, such as the gate of a power  
MOSFET. The output is LOW in the off  
state, consistent with N-channel  
devices.  
The CS384XB family incorporates a  
precision temperature-controlled oscil-  
lator with an internally trimmed dis-  
charge current to minimize variations  
in frequency. A precision duty-cycle  
clamp eliminates the need for an exter-  
nal oscillator when a 50% duty-cycle is  
used. Duty-cycles of almost 100% are  
Maximum Duty-cycle  
Clamp  
VREF stabilization before  
Output Enable  
These ICs are available in 8 and 14 lead  
surface mount (SO) and 8 lead PDIP  
packages.  
Pulse-by-pulse Current  
Limiting  
Improved Undervoltage  
Absolute Maximum Ratings  
Lockout  
Supply Voltage (ICC<30mA)..........................................................Self Limiting  
Supply Voltage (Low Impedance Source)...................................................30V  
Output Current ...............................................................................................±1A  
Output Energy (Capacitive Load) .................................................................5µJ  
Analog Inputs (VFB, Sense) ............................................................-0.3V to 5.5V  
Error Amp Output Sink Current...............................................................10mA  
Lead Temperature Soldering  
Double Pulse Suppression  
1% Trimmed Bandgap  
Reference  
High Current Totem Pole  
Output  
Package Options  
Wave Solder (through hole styles only) ...................10 sec. max, 260°C peak  
Reflow (SMD styles only) ....................60 sec. max above 183°C, 230°C peak  
8 Lead PDIP & SO Narrow  
Block Diagram  
1
2
3
4
8
7
6
5
COMP  
VFB  
VREF  
VCC  
VCC  
VCC Pwr  
Undervoltage  
Lock-out Circuit  
Sense  
OSC  
VOUT  
Gnd  
34V  
Set/  
5V  
VREF  
Reset Reference  
Gnd  
16V/10V  
(8.4V/7.6V)  
Internal  
Bias  
14L SO Narrow  
REF  
2.50V  
Output  
Enable  
OSC  
NOR  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
Oscillator  
COMP  
NC  
VREF  
NC  
VOUT  
S
R
2 R  
+
VFB  
VCC  
PWM  
Latch  
VFB  
VC  
Error  
Pwr Gnd  
NC  
VCC Pwr  
VOUT  
R
Amplifier  
Current  
Sense  
Comparator  
1 V  
COMP  
Sense  
Sense  
NC  
Pwr Gnd  
Gnd  
( ) Indicates CS-3843B  
8
OSC  
ON Semiconductor  
2000 South County Trail, East Greenwich, RI 02818  
Tel: (401)885–3600 Fax: (401)885–5786  
N. American Technical Support: 800-282-9855  
Web Site: www.cherry–semi.com  
June, 1999 - Rev. 3  
1

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