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CF5008A3-2 PDF预览

CF5008A3-2

更新时间: 2024-02-09 05:33:26
品牌 Logo 应用领域
NPC /
页数 文件大小 规格书
9页 156K
描述
Oscillator, 7.5MHz Nom, CMOS,

CF5008A3-2 技术参数

是否Rohs认证: 符合生命周期:Contact Manufacturer
Reach Compliance Code:unknown风险等级:5
标称工作频率:7.5 MHz最高工作温度:80 °C
最低工作温度:-20 °C最大输出低电流:8 mA
封装等效代码:DIE OR CHIP电源:3/5 V
认证状态:Not Qualified子类别:Other Oscillators
最大压摆率:58 mA技术:CMOS
Base Number Matches:1

CF5008A3-2 数据手册

 浏览型号CF5008A3-2的Datasheet PDF文件第2页浏览型号CF5008A3-2的Datasheet PDF文件第3页浏览型号CF5008A3-2的Datasheet PDF文件第4页浏览型号CF5008A3-2的Datasheet PDF文件第6页浏览型号CF5008A3-2的Datasheet PDF文件第7页浏览型号CF5008A3-2的Datasheet PDF文件第8页 
CF5008 s eries  
FUNCTIONAL DESCRIPTION  
Standby Function  
The oscillator output on Q changes as shown in the following table when INH goes LOW.  
INH  
HIGH (or open)  
LOW  
Q
Oscillator  
f
Normal operation  
Normal operation  
O
High impedance  
TYPICAL APPLICATION CIRCUIT  
Typical circuit structures (C and C ) that use a varicap device have a reduced frequency range due to the  
G
D
effects of parasitic capacitance. The CF5008 series, however, have built-in components C and R that are  
C
B2  
connected in series with the varicap device, increasing the frequency output range.  
VCXO Module  
Rf  
VDD  
VSS  
CG  
XT  
VCC  
GND  
X'tal  
CD  
Rd  
Control  
Input  
1/2  
1/2  
Q
Output  
CC  
VARI-CAP  
Rp  
INH  
Output  
Enable  
Control Circuits  
XT2  
RB2  
CF5008  
PARASITIC CAPACITANCE  
Parasitic capacitance are unwanted capacitance effects that occur due to the junction capacitance where the  
protection diodes and transistor drains are connected to the substrate. The following equivalent circuit figure  
shows the calculated parasitic capacitances. The surface area for each component is calculated from the IC lay-  
out pattern, and the capacitance calculated per unit area.  
Rf 150k  
C
20p  
G
2.4p  
5.01p  
XT  
VDD  
Rd  
VSS  
Q
C
10p  
D
1/2  
1/2  
C
70p  
C
Rp  
100k  
4.7p  
Control Circuits  
XT2  
INH  
R
B2  
50k  
NIPPON PRECISION CIRCUITS—5  

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