CD74HCT4094M96

更新时间： 2024-02-19 02:57:42

品牌	Logo	应用领域
德州仪器 - TI		移位寄存器存储触发器逻辑集成电路光电二极管输出元件
页数	文件大小	规格书
18页	513K
描述
High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State

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技术参数
数据手册
替代型号

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CD74HCT4094M96 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	SOIC-16	针数：	16
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
Factory Lead Time：	1 week	风险等级：	0.76
Samacsys Confidence：	3	Samacsys Status：	Released
Samacsys PartID：	1326559	Samacsys Pin Count：	16
Samacsys Part Category：	Integrated Circuit	Samacsys Package Category：	Small Outline Packages
Samacsys Footprint Name：	D (R-PDSO-G16)-	Samacsys Released Date：	2020-05-15 14:38:10
Is Samacsys：	N	其他特性：	PARALLEL OUTPUT IS LATCHED; SERIAL OUTPUT LATCHED WITH SHIFT CLOCK ALSO AVAILABLE
计数方向：	RIGHT	系列：	HCT
JESD-30 代码：	R-PDSO-G16	JESD-609代码：	e3
长度：	9.9 mm	负载电容（CL）：	50 pF
逻辑集成电路类型：	SERIAL IN PARALLEL OUT	最大频率@ Nom-Sup：	20000000 Hz
最大I（ol）：	0.004 A	湿度敏感等级：	1
位数：	8	功能数量：	1
端子数量：	16	最高工作温度：	125 °C
最低工作温度：	-55 °C	输出特性：	3-STATE
输出极性：	TRUE	封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装等效代码：	SOP16,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
包装方法：	TR	峰值回流温度（摄氏度）：	260
电源：	5 V	最大电源电流（ICC）：	0.08 mA
Prop。Delay @ Nom-Sup：	43 ns	传播延迟（tpd）：	43 ns
认证状态：	Not Qualified	施密特触发器：	No
座面最大高度：	1.75 mm	子类别：	Shift Registers
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	MILITARY
端子面层：	Matte Tin (Sn)	端子形式：	GULL WING
端子节距：	1.27 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	触发器类型：	POSITIVE EDGE
宽度：	3.91 mm	最小 fmax：	60 MHz
Base Number Matches：	1

CD74HCT4094M96 数据手册

CD54HC4094, CD74HC4094,

CD74HCT4094

Data sheet acquired from Harris Semiconductor

SCHS211D

High-Speed CMOS Logic

8-Stage Shift and Store Bus Register, Three-State

November 1997 - Revised October 2003

Two serial outputs are available for cascading a number of

Features

• Buffered Inputs

these devices. Data is available at the QS serial output

terminal on positive clock edges to allow for high-speed

operation in cascaded system in which the clock rise time is

• Separate Serial Outputs Synchronous to Both

Positive and Negative Clock Edges For Cascading

[ /Title

(CD74H

C4094,

CD74H

CT4094

)

/Sub-

ject

(High

Speed

CMOS

Logic 8-

fast. The same serial information, available at the QS

terminal on the next negative clock edge, provides a means

for cascading these devices when the clock rise time is slow.

• Fanout (Over Temperature Range)

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

Ordering Information

• Wide Operating Temperature Range . . . -55 C to 125 C

• Balanced Propagation Delay and Transition Times

TEMP. RANGE

PART NUMBER

CD54HC4094F3A

CD74HC4094E

( C)

PACKAGE

16 Ld CERDIP

16 Ld PDIP

16 Ld SOIC

16 Ld SOP

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

-55 to 125

• HC Types

- 2V to 6V Operation

CD74HC4094M

- High Noise Immunity: N = 30%, N = 30% of V

IL IH CC

at V

= 5V

CD74HC4094MT

CD74HC4094M96

CD74HC4094NSR

CD74HC4094PW

CD74HC4094PWR

CD74HC4094PWT

CD74HCT4094E

CD74HCT4094M

CD74HCT4094MT

CD74HCT4094M96

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

V = 0.8V (Max), V = 2V (Min)

IL IH

16 Ld TSSOP

16 Ld PDIP

16 Ld SOIC

- CMOS Input Compatibility, I ≤ 1µA at V , V

OL OH

Description

The ’HC4094 and CD74HCT4094 are 8-stage serial shift

registers having a storage latch associated with each stage

for strobing data from the serial input to parallel buffered

three-state outputs. The parallel outputs may be connected

directly to common bus lines. Data is shifted on positive

clock transitions. The data in each shift register stage is

transferred to the storage register when the Strobe input is

high. Data in the storage register appears at the outputs

whenever the Output-Enable signal is high.

NOTE: When ordering, use the entire part number. The sufﬁxes 96

and R denote tape and reel. The sufﬁx T denotes a small-quantity

reel of 250.

Pinout

CD54HC4094 (CERDIP)

CD74HC4094 (PDIP, SOIC, SOP, TSSOP)

CD74HCT4094 (PDIP, SOIC)

TOP VIEW

STROBE

DATA

16 V

15 OE

14 Q

13 Q

12 Q

11 Q

10 QS

GND

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

12 3 4 5 6 7...18

中文翻译

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CD74HCT4094M96 替代型号

型号	品牌	替代类型	描述	数据表
CD74HCT4094MT	TI	完全替代	High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State
CD74HCT4094ME4	TI	完全替代	High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State
CD74HCT4094M	TI	完全替代	High Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State

与CD74HCT4094M96相关器件

型号	品牌	获取价格	描述	数据表
CD74HCT4094M96E4	TI	获取价格	High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State
CD74HCT4094M96G4	TI	获取价格	High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State
CD74HCT4094ME4	TI	获取价格	High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State
CD74HCT4094MG4	TI	获取价格	High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State
CD74HCT4094MT	TI	获取价格	High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State
CD74HCT4094MTE4	TI	获取价格	High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State
CD74HCT4094MTG4	TI	获取价格	High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State
CD74HCT42	TI	获取价格	High Speed CMOS Logic BCD To Decimal Decoder 1 of 10
CD74HCT423	HARRIS	获取价格	High Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Resets
CD74HCT423	TI	获取价格	High Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Resets

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