CD4532BMS
CMOS 8-Bit Priority Encoder
December 1992
Features
Pinout
CD4532BMS
TOP VIEW
• High Voltage Type (20V Rating)
• Converts From 1 of 8 to Binary
• Provides Cascading Feature to Handle Any Number of
Inputs
D4
D5
1
2
3
4
5
6
7
8
16 VDD
15 E0
14 GS
13 D3
12 D2
11 D1
10 D0
• Group Select Indicates One or More Priority Inputs
• Standardized Symmetrical Output Characteristics
• 100% Tested for Quiescent Current at 20V
D6
D7
EI
Q2
Q1
VSS
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25oC
9
Q0
• Noise Margin (Over Full Package/Temperature Range)
- 0.5V at VDD = 5V
- 1.5V at VDD = 10V
- 1.5V at VDD = 15V
Functional Diagram
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
D7
Q2
Q1
Q0
PRIORITY
SELECT
ENCODER
Applications
• Priority Encoder
D0
E0
• Binary or BCD Encoder (Keyboard Encoding)
• Floating Point Arithmetic
GS
E1
Description
CD4532BMS consists of combinational logic that encodes
the highest priority input (D7 - D0) to a 3-bit binary code. The
eight inputs, D7 through D0, each have an assigned priority;
D7 is the highest priority and D0 is the lowest. The priority
encoder is inhibited when the chip-enable input E1 is low.
When E1 is high, the binary representation of the highest-
priority input appears on output lines Q2 - Q0, and the group
select line GS is high to indicate that priority inputs are
present. The enable-out (EO) is high when no priority inputs
are present. If any one input is high, EO is low and all cas-
caded lower-order stages are disabled.
The CD4532BMS is supplied in these 16-lead outline packages:
Braze Seal DIP
Frit Seal DIP
Ceramic Flatpack
H4T
H1E
H6W
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
File Number 3344
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7-1227