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CAT24C083JI-28TE13 PDF预览

CAT24C083JI-28TE13

更新时间: 2024-02-14 03:29:30
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CATALYST 监控控制器可编程只读存储器
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12页 89K
描述
Supervisory Circuits with I2C Serial CMOS E2PROM, Precision Reset Controller and Watchdog Timer

CAT24C083JI-28TE13 数据手册

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CAT24C163/083/043/023  
Advanced  
PIN DESCRIPTIONS  
with open drain RESET outputs. During power-up, the  
RESET outputs remain active until VCC reaches the  
VTH threshold and will continue driving the outputs for  
approximately 200ms (tPURST) after reaching VTH. After  
the tPURST timeout interval, the device will cease to drive  
resetoutputs.Atthispointtheresetoutputswillbepulled  
upordownbytheirrespectivepullup/pulldowndevices.  
During power-down, the RESET outputs will begin driv-  
ing active when VCC falls below VTH. The RESET  
outputs will be valid so long as VCC is >1.0V (VRVALID).  
WDI: WATCHDOG INPUT  
If there is no transition on the WDI for more than 1.6  
seconds, the watchdog timer times out.  
WP: WRITE PROTECT  
If the pin is tied to VCC the entire memory array becomes  
WriteProtected(READonly). WhenthepinistiedtoVSS  
or left floating normal read/write operations are allowed  
to the device.  
The RESET pins are I/Os; therefore, the CAT24CXXX  
can act as a signal conditioning circuit for an externally  
applied reset. The inputs are level triggered; that is, the  
RESET input in the 24CXXX will initiate a reset timeout  
after detecting a high and the RESET input in the  
24CXXXwillinitiatearesettimeoutafterdetectingalow.  
SCL: SERIAL CLOCK  
The serial clock input clocks all data transferred into or  
out of the device.  
RESET/RESET: RESET I/O  
These are open drain pins and can be used as reset  
triggerinputs. Byforcingaresetconditiononthepinsthe  
device will initiate and maintain a reset condition for  
approximately 200ms. RESET pin must be connected  
through a pull-down and RESET pin must be connected  
through a pull-up device.  
Watchdog Timer  
The Watchdog Timer provides an independent protec-  
tion for microcontrollers. During a system failure, the  
CAT24CXXX will respond with a reset signal after a  
time-outintervalof1.6secondsforalackofactivity. The  
24CXX3 is designed with a WDI input pin for the Watch-  
dogTimerfunction. Forthe24CXX3,ifthemicrocontroller  
doesnot toggletheWDIinputpinwithin1.6seconds,the  
Watchdog Timer times out. This will generate a reset  
condition on reset outputs. The Watchdog Timer is  
cleared by any transition on WDI.  
SDA: SERIAL DATA/ADDRESS  
The bidirectional serial data/address pin is used to  
transfer all data into and out of the device. The SDA pin  
is an open drain output and can be wire-ORed with other  
open drain or open collector outputs.  
DEVICE OPERATION  
Reset Controller Description  
As long as the reset signal is asserted, the Watchdog  
Timer will not count and will stay cleared.  
The CAT24CXXX provides a precision RESET control-  
ler that ensures correct system operation during brown-  
out and power up/down conditions. It is configured  
t
Figure 1. RESET Output Timing  
GLITCH  
V
TH  
V
RVALID  
V
CC  
t
RPD  
t
t
PURST  
PURST  
RESET  
t
RPD  
RESET  
Doc. No. 25080-00 3/98 M-1  
5

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