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CAT24C041J-42 PDF预览

CAT24C041J-42

更新时间: 2024-01-26 11:51:51
品牌 Logo 应用领域
CATALYST 可编程只读存储器电动程控只读存储器电可擦编程只读存储器光电二极管内存集成电路
页数 文件大小 规格书
12页 73K
描述
EEPROM, 512X8, Serial, CMOS, PDSO8

CAT24C041J-42 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:SOP, SOP8,.25Reach Compliance Code:unknown
风险等级:5.92数据保留时间-最小值:100
耐久性:1000000 Write/Erase CyclesI2C控制字节:1010XXMR
JESD-30 代码:R-PDSO-G8JESD-609代码:e0
内存密度:4096 bit内存集成电路类型:EEPROM
内存宽度:8端子数量:8
字数:512 words字数代码:512
最高工作温度:70 °C最低工作温度:
组织:512X8封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:SERIAL电源:5 V
认证状态:Not Qualified串行总线类型:I2C
最大待机电流:0.00005 A子类别:EEPROMs
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
写保护:HARDWAREBase Number Matches:1

CAT24C041J-42 数据手册

 浏览型号CAT24C041J-42的Datasheet PDF文件第1页浏览型号CAT24C041J-42的Datasheet PDF文件第2页浏览型号CAT24C041J-42的Datasheet PDF文件第4页浏览型号CAT24C041J-42的Datasheet PDF文件第5页浏览型号CAT24C041J-42的Datasheet PDF文件第6页浏览型号CAT24C041J-42的Datasheet PDF文件第7页 
Advanced Information  
A.C. CHARACTERISTICS  
CAT24CXX1/XX2  
V
=2.7V to 6.0V unless otherwise specified.  
CC  
Output Load is 1 TTL Gate and 100pF  
Read & Write Cycle Limits  
Symbol  
Parameter  
VCC=2.7V - 6V  
VCC=4.5V - 5.5V  
Min.  
Max.  
100  
Min.  
Max.  
Units  
kHz  
ns  
FSCL  
TI(1)  
Clock Frequency  
400  
200  
Noise Suppression Time  
200  
Constant at SCL, SDA Inputs  
tAA  
SCL Low to SDA Data Out  
and ACK Out  
3.5  
1
µs  
µs  
(1)  
tBUF  
Time the Bus Must be Free Before  
a New Transmission Can Start  
4.7  
1.2  
tHD:STA  
tLOW  
Start Condition Hold Time  
Clock Low Period  
4
0.6  
1.2  
0.6  
0.6  
µs  
µs  
µs  
µs  
4.7  
4
tHIGH  
Clock High Period  
tSU:STA  
Start Condition Setup Time  
4.7  
(for a Repeated Start Condition)  
tHD:DAT  
tSU:DAT  
Data In Hold Time  
0
0
ns  
ns  
µs  
ns  
µs  
ns  
Data In Setup Time  
50  
50  
(1)  
tR  
SDA and SCL Rise Time  
SDA and SCL Fall Time  
Stop Condition Setup Time  
Data Out Hold Time  
1
0.3  
(1)  
tF  
300  
300  
tSU:STO  
tDH  
4
0.6  
100  
100  
(1)(2)  
Power-Up Timing  
Symbol  
Parameter  
Max.  
Units  
ms  
tPUR  
tPUW  
Power-up to Read Operation  
Power-up to Write Operation  
1
1
ms  
Note:  
(1) This parameter is tested initially and after a design or process change that affects the parameter.  
(2) t and t are the delays required from the time V is stable until the specified operation can be initiated.  
PUR  
PUW  
CC  
Write Cycle Limits  
Symbol  
Parameter  
Min.  
Typ.  
Max  
Units  
tWR  
Write Cycle Time  
10  
ms  
The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal program/erase  
cycle. During the write cycle, the bus interface circuits are disabled, SDA is allowed to remain high, and the device  
does not respond to its slave address.  
Doc. No. 25079-00 8/99 M-1  
3

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